Dear Sirs, Mr. Coppi! ...I use the CAN-Module of a CA-step. Because everything was fine using the Board, I burned it without looking at the errata sheed...I was surprised at the result! Now I want to please You help me avoid another mistake. The behavior can be avoided if a message object is not updated by software when a transmission of the corresponding message object is pending (TXRQ element is set) and the CAN module is active (INIT = 0). Does that mean, if I would disable the CAN module each time I change something (data) in an object and enable it after that everything will be o.K.? The nodes in the CAN system ignore the remote frame with the identifier=0 and no data frame is triggered by this remote frame. Is this another or additional possibility? Is there a way to disable only the identifier '0'? I'm not so sure if I did understand the errata well, so please don't wonder about this questions. Do You know about a distributor who could have a flash device of the C164? (It's really expensive for me to burn them so often and this could prevent al least wrong startup configurations other mistakes which are not step-specific?!) Thanks a lot for helping me hannes P.S. why differs the behaviour using the RAM of the Board instead of OTP??
Hello Hannes, if you chip works fine in debug (RAM) mode and not in OTP, it is unlikely you have problems due to what described into Errata Sheet. (My personal opinion...) Please describe what is happening on your system, maybe it is just a startup or mapping problem.
Thanks for reply! I will try to describe the behaviour completely... ..if I use RAM everything is fine, if I use flash (on board) or start from OTP, some Messages will be send for example like ID= 374 data length= 15 contents is 0xFF or 0xDF. Some are Remote transmission requests, some normal messages. The Message that should be send for testing if the CAN works, is never transmitted. I think You are right again, the configured startup configuration (e.g. clcfg=4(XTAL*5), clckout enabled) seems to be ignored, and the Port0 seems to be used for initialising. I saw, I had forgotten that the internal Rom was mapped to segment1- this version is burned now! The not mapped version (in flash) behaves like the OTP version too. I must admit, i don't know exactly what the mapping means- I think, Segment1 is normal OTP space, and the programm should work fine also in that area?! The external configuration is: EA =high, RD =high, ALE =0, the RESET will be high- delayed by a capacitor. I hope You are not shocked at me! ( ...I am sometimes because I seem to do wrong everything that is possible) Best regards hannes
Ciao Hannes, let's start from this: you have an application that - works correctly when placed in RAM. - stops working when flashed. Program behaves like a RAM segment is misplaced. (Variables are mapped in a place where no RAM exist). You may have several problems: 1) startup file for Flash is different from startup file for RAM and your Flash startup file contains wrong settings. 2) memory map for Flash is different from memory map for RAM and your Flash mapping contains wrong settings. Regarding 1): do you have a project (any project) that works correctly when flashed on the same hardware? If YES, just take the startup file from that project and check its settings against the startup you are actually using. If NO, check carefully the startup to understand if you have any wrong register setting. Regarding 2): check the MAP file, data sections must be located in RAM, const and code sections must be located in ROM. Check CAREFULLY that your sections reside INTO existing space (maybe you have some data section located into NOWHERE, outside of existing RAM). NEVER map ROM to Segment 1 when you run with EA = 1 (unless you know what you are doing). Mapping ROM to SEGMENT 1 means that the ROM is moved from address 0 to another address over 64K. This is useful when you want to use an external Flash located at 0 but you want still to use the internal ROM. If you leave the ROM enabled, you cannot see the external Flash at 0 because the internal ROM is mapped at the same addresses and it has precedence over external bus. Moving to a different location will allow you to see the External Flash at 0. Think about this: you are running a program from internal ROM located at 0, let's say you are executing at address 0x0200 and you move the ROM away from 0; you may experience some problem, because the ROM will no more be there (at 0) and microcontroller will fetch instructions from NOWHERE... So, don't try to move the ROM until you are sure about what you are doing. About startup clock frequency: I cannot check it here because I don't have the manuals with me, I will check ASAP and let you know. Ciao Bruno
Dear Mr. Coppi! I gave up to figure out the Problems (e.g. the clock works correct only with jumperconfiguration, allthough i did configure it by software....). I want to please You to write Your opinion to that: i will take the CAN Project i wrote once and burn it. The difference is the use of CA-step instead of DA-step. I think it should work? To be sure i will mask out the eleventh bit of the ID arbitration register, so all ID's must be higher than, or equal 0x400 for beeing accepted. By that way i hope to prevent the CAN module for sending request messages with ID '0'(?!) I would do because i read this in errata sheet: Workarounds: • The behavior can be avoided if a message object is not updated by software when a transmission of the corresponding message object is pending (TXRQ element is set) and the CAN module is active (INIT = 0). If a re-transmission of a message (e.g. after lost arbitration or after the occurrence of an error frame) needs to be cancelled, the TXRQ element should be cleared by software as soon as NEWDAT is reset from the CAN module. • The nodes in the CAN system ignore the remote frame with the identifier=0 and no data frame is triggered by this remote frame. Would be nice if You could help me by that decision (it's really expensive by the time). Like i wrote before i wonder about the difference between RAM and Flash memory. I took a look at the schematic of the board and the memories are connected in parallel. So i can't really explain how this could be different. Could it be a reason of waitstates or something like that? (I think the startup of Ram is the same of Flash?) Do You know something? All that seems to me like kind of mystic. Do You know literarure, where is written more about the map file, i think i have to learn about these things to be more sure knowing what i'm doing! Sorry, that i reacted so late to your reply- i have to learn for some tests at the moment. Thank You! Best regards hannes
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