Can someone tell me is there a possibility for excluding some ASM instruction from C KEIL compiler? (while compiler is converting C files to ASM during compilation, may those instruction be avoided?) Brana
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I strongly suspect that writing ones own routines in assembler would take several years less than getting that to work... Stefan, are you sitting down? I agree. Anyhow to the general subject of this post, this (or VERY similar) has been discussed before. It seems that when a ASIC/CPLD implementer run into trouble with implementing some instruction(s) (s)he post "can the compiler do without". The OP could implement the "added functionality" using A5, xx as opcodes for the added stuff and maintain full compatibility with the standard. Erik
"Alternatively, SDCC is an open-source compiler - so maybe you could modify that to your requirements...?" I strongly suspect that writing ones own routines in assembler would take several years less than getting that to work...
Thank you, but I'll find another way to speed up the firmware, time is critical for me too.. :)
First you said, "This is FPGA processor core, and we have some block related with ALU which is very slow in execution." Now you say, "My 8051 has system clock 150MHz, and execution of one instruction in 2 cycles" Seems bizarre to me - so slow, and yet so fast!? I don't see how excluding a few instructions will help. Which instructions do you want to exclude, and how do you think it will help? The only way you could prevent the compiler from using some instructions would be to get Keil to write a special version specifically for you. Perhaps if you could give full details of what you're actually trying to achieve, and what the problem is, we could think of a solution? Alternatively, SDCC is an open-source compiler - so maybe you could modify that to your requirements...?
I thought so... Thank you very much!
"Yes, actually to tell compiler to remove some instructions from the whole union of instruction supported." No, you can't do that.
No, that is not a point. My 8051 has system clock 150MHz, and execution of one instruction in 2 cycles.
Yes, actually to tell compiler to remove some instructions from the whole union of instruction supported.
Are you saying that you've got an FPGA core that actually executes 8051 machine instructions slower (ie, in more clock cycles) than a real 8051???
I think I understand. You're trying to get tell the compiler to change its implementation of library functions to avoid the use of certain instructions?
This is FPGA processor core, and we have some block related with ALU which is very slow in execution. Generally we are trying to speed up our firmware because we are currently too slow.
Can you explain why you are trying to do this? It may help to understand your question.
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