• Raspberry PI 3 DSTREAM JTAG debugging

    I have trouble with RPi-3 bare metal debugging. I use DSTREAM unit with DS-5 (upgraded, the latest version).

    1. U-boot was added a startup code that sets up GPIO pins to support JTAG connection

    2. DS-5 properly does boundary scanning, result is similar…

  • Debug server for multiple cores SOC

    Hi,

    I see the latest feature in DS5 v5.27 concerning the possibility to open a debug server.

    I successfully connect to one CPU core on my SOC remotly, by ethernet, but how to open multiple servers, on distinct CPUs?

    I try to use different port numbers…

  • RDDI Trace Clock Error

    Hello,

    I am writing a program using the RDDI API to stream trace from a DSTREAM-ST. The problem is that whenever I start up the DSTREAM-ST and then connect using RDDI from my program, the connection works fine, but once I begin tracing, the TRC_CLK light…

  • How do I debug NXP-iMX7 SABRE board using MD-5?

    I am trying to connect to NXP iMX7 SABRE board using usb cable as a serial connection.

    How should I configure the debugger to connect?

  • Connect with Custom Board (am5726 SoC) using DStream

    Hi 

    I am using custom board (am5726) with DStream and unable to connect (RVC file is attached)

    tmdsevm572x_a15 (2).txt
    <?xml version="1.0"?>
    
    <?RVConfigUtility MajorVersion = "0" MinorVersion = "0" PatchVersion = "0"?>
    <RVConfigUtility>
       <redistributable…

  • Seeking DS-5 configdb platform entry for AST25xx EVB

    I am using DS-5 along with DSTREAM probe to develop software on an AST25xx EVB.

    I am looking to get the configuration database files for this board, including proper

    configuration files to enable flash programming.  I spoke with the vendor ASPEED, but

  • How to set a conditional breakpoint on a register value?

    Using DS-5's Eclipse debugger and DSTREAM agent, I am stepping through the code running on an ARM M7 in a chip on a dev board. The build was done using optimization level -O1, so not all variables are visible in the debugger and the "current statement…

  • Unable to create new platform configuration with zedboard for core detection using DS5, DStream without using existing Xillinx configuration

    Unable to create new platform configuration with zedboard  for core detection using DS5, DStream without using default Xillinx configuration, Kindly guide us thanks in advance

    we are connected the  JTAG from J15 (zedboard) to  DStream debugger

    observed following…