Cortex A9 errata Arm reference 761319

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  • Note: This was originally posted on 1st December 2011 at http://forums.arm.com

    Chandra,

    Your code doesn't appear to be exercising the issue in the document you reference, this requires the same variable/memory location to be used for all accesses.
    You are writing to and reading from two separate locations, which in normal memory is never guaranteed to be appear ordered without barriers or appropriate address/control hazards.

    hth
    s.
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  • Note: This was originally posted on 1st December 2011 at http://forums.arm.com

    Chandra,

    Your code doesn't appear to be exercising the issue in the document you reference, this requires the same variable/memory location to be used for all accesses.
    You are writing to and reading from two separate locations, which in normal memory is never guaranteed to be appear ordered without barriers or appropriate address/control hazards.

    hth
    s.
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