I-cache coherency maintence

Note: This was originally posted on 14th February 2011 at http://forums.arm.com

I'm a newbie in ARM.
It's said that in case of multi-core I-cache coherency not maintained by SCU even if memory marked as sharable.
I've got some self-modifying code  and I wonder which steps  should I do to maintain I-cache coherency?

Thanks.
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