Arm Community
Site
Search
User
Site
Search
User
Groups
Arm Research
DesignStart
Education Hub
Graphics and Gaming
High Performance Computing
Innovation
Multimedia
Open Source Software and Platforms
Physical
Processors
Security
System
Software Tools
TrustZone for Armv8-M
中文社区
Blog
Announcements
Artificial Intelligence
Automotive
Healthcare
HPC
Infrastructure
Innovation
Internet of Things
Machine Learning
Mobile
Smart Homes
Wearables
Forums
All developer forums
IP Product forums
Tool & Software forums
Support
Open a support case
Documentation
Downloads
Training
Arm Approved program
Arm Design Reviews
Community Help
More
Cancel
Developer Community
Tools and Software
Software Tools
Jump...
Cancel
Software Tools
Arm Development Studio forum
SWI interrupt (SVC) on ARM Cortex A9
Tools, Software and IDEs blog
Forums
Videos & Files
Help
Jump...
Cancel
New
Replies
3 replies
Subscribers
126 subscribers
Views
4119 views
Users
0 members are here
Related
SWI interrupt (SVC) on ARM Cortex A9
Offline
fairuz wan ismail
over 7 years ago
Note: This was originally posted on 9th February 2011 at http://forums.arm.com
Hi,
Right now I'm trying to access some CP15 registers (ARM Cortex A9). And these registers can be accessed only in privileged mode which is normal. Actually I dont know how to change from user mode to svc mode easily. I read that we can use SW interrupt but how can I attach my handler function to the SWI? can I just write to the address 0x08 the pointer to the handler?
Thanks for your time.
Offline
Martin Weidmann
over 7 years ago
Note: This was originally posted on 16th March 2011 at
http://forums.arm.com
yes
Cancel
Up
0
Down
Reply
Cancel
Offline
Martin Weidmann
over 7 years ago
Note: This was originally posted on 9th February 2011 at
http://forums.arm.com
Pretty much.
When execute an SVC instruction (SWI is the old name) the processor will switch to Supervisor mode, and branch to address 0x8*. So at address 0x8 you need a branch to your handler code.
* Technically it will be vector base address +0x8. The default location is 0x0.
Cancel
Up
0
Down
Reply
Cancel
Offline
Dhananjay Ransing
over 7 years ago
Note: This was originally posted on 16th March 2011 at
http://forums.arm.com
That means we have to branch to any perticular handler (system / supervisor mode) from location 0x08 again, right??
Cancel
Up
0
Down
Reply
Cancel
More questions in this forum
By title
By date
By reply count
By view count
By most asked
By votes
By quality
Descending
Ascending
All recent questions
Unread questions
Questions you've participated in
Questions you've asked
Unanswered questions
Answered questions
Questions with suggested answers
Questions with no replies
Suggested Answer
How to execute tag manipulation instructions in Cortex-A76 FVP
0
9651
views
2
replies
Latest
6 months ago
by
Stephen Theobald
Suggested Answer
Failed to debug hello world project on Cortex-A76
0
9494
views
1
reply
Latest
6 months ago
by
Stephen Theobald
Suggested Answer
DS-5: Unable to connect to USB-Blaster
0
9121
views
1
reply
Latest
6 months ago
by
Ronan Synnott
Suggested Answer
ARM 8.5-A BTI and MTE Benchmarking
0
25453
views
6
replies
Latest
6 months ago
by
Stephen Theobald
Suggested Answer
ARM64 Linaro toochain Link error ( R_AARCH64_ADR_PREL_PG_HI21 )
0
9905
views
2
replies
Latest
7 months ago
by
Kishan Patel
<
>
View all questions in Arm Development Studio forum