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AXI terminology - Multiple outstanding , out of order , interleaving

Note: This was originally posted on 23rd December 2010 at http://forums.arm.com

Hi All,

In the AXI protocol, can you help me understand in depth about the multiple outstanding addresses, out-of order completion and data interleaving

Scenario 1:
There is Only 1 AXI master (with support of only 1 Master ID) doing transaction to a slave which is capable of handling multiple outstanding addresses.
So Master sets up A0 address and next A1 address. But since Master is capable of only handling single ID, it will place always only 1 valid ID. Is this kind of transaction also referred to as Multiple out standing addresses?

Scenario 2: There is single master with capability of issuing different ID for different transactions. So if there is
A0 with ID 2 and A1 with ID 3, This scenario is called multiple outstanding address. Is my understanding correct?

Scenario 3: In scenario 2, If there are different slaves (1 faster and 1 slower) then how do i issue the out -of order write transaction to different slaves?
Suppose i entered with A0 - ID 2, and A1 - ID 3 on the write address channel and i got the respose of address being accepted. Now i dont know which slave is slow and which is fast. So how do i place my data on the Write data channel? Since the Master dont know which slave is fast or slow, how do i take decision on which data to be placed on Write data channel with corresponding ID and Valid?

I have many querys in Read transactions too. But would like to go step by step in understanding the terms.
Thank you in advance

Best Regards
Sandeep.M
  • Note: This was originally posted on 27th December 2010 at http://forums.arm.com

    Hello JD,

    Thank you very much. It has cleared lot of questions that i had.

    One concern i had in mind was , out-of order from master - which eventually does not make sense. Thanks for clarifying that out-of-order is only for slaves.
    So any write transaction, unless master supports data interleaving, is a serialized approach.

    Many of read related questions become clear, since the Slaves can support out-of order, so they can send back data to masters with ID.

    Thank you
    Regards
    Sandeep.M
  • Note: This was originally posted on 23rd December 2010 at http://forums.arm.com


    Scenario 1:
    There is Only 1 AXI master (with support of only 1 Master ID) doing transaction to a slave which is capable of handling multiple outstanding addresses.
    So Master sets up A0 address and next A1 address. But since Master is capable of only handling single ID, it will place always only 1 valid ID. Is this kind of transaction also referred to as Multiple out standing addresses?


    This would only be multiple outstanding addresses assuming addresses A0 and A1 have not yet completed the full data transactions, and assuming the slave has accepted both addresses.

    However as they use the same ID there is no possibility of any interleaving or re-ordering.

    The only real benefit here of the outstanding address support for this slave is that it has advanced notice of A1, hopefully so that it can prepare to complete that transaction more efficiently once A0 has finished.


    Scenario 2: There is single master with capability of issuing different ID for different transactions. So if there is
    A0 with ID 2 and A1 with ID 3, This scenario is called multiple outstanding address. Is my understanding correct?


    This would also be multiple outstanding transactions, again assuming the A0 and A1 transactions are still active (you have not seen BRESP or RLAST transfers).

    This time as the IDs are unique, data interleaving and re-ordering could also be supported.


    Scenario 3: In scenario 2, If there are different slaves (1 faster and 1 slower) then how do i issue the out -of order write transaction to different slaves?
    Suppose i entered with A0 - ID 2, and A1 - ID 3 on the write address channel and i got the respose of address being accepted. Now i dont know which slave is slow and which is fast. So how do i place my data on the Write data channel? Since the Master dont know which slave is fast or slow, how do i take decision on which data to be placed on Write data channel with corresponding ID and Valid?


    "Out-of-order" is a term usually referring to slaves, not masters. Slaves can return read data in a different order to that the addresses were received (if the IDs are different), or they can return BRESP write responses at the end of the write data transfers, again in a different order to that of the addresses, if the IDs are different.

    Masters can interleave write data to the 2 different slaves (where IDs are unique), but this would be done because the master has that data available, not because it knows a specific slave can accept that data. If this particular data happens to be for your slower slave, WREADY will be driven low from that slave to stall the master until the slave is able to accept that data, and this will stall all data transfers from that master.

    However when designing the interconnect logic linking your master to the 2 slaves, and if you knew slave #2 was slow, you could implement some sort of write data buffer on the interconnect output port driving slave #2 so that the buffer fills up quickly with the master data, and then slowly empties at the slave's data rate, thus not impacting on the master..


    I have many querys in Read transactions too. But would like to go step by step in understanding the terms.


    All of the above is really just rewording what is already described in the AXI protocol, so it might be best just reading the protocol until you are familiar with the ordering models described, and then hopefully you could then answer most of your own questions :rolleyes:, but hopefully this helps with your initial question.

    JD