<?xml version="1.0" encoding="UTF-8" ?>
<?xml-stylesheet type="text/xsl" href="https://community.arm.com/utility/feedstylesheets/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/"><channel><title>Duplicate globally-mapped Micro TLB entries</title><link>https://community.arm.com/developer/tools-software/tools/f/armds-forum/791/duplicate-globally-mapped-micro-tlb-entries</link><description> Note: This was originally posted on 3rd November 2010 at http://forums.arm.com I am mapping a page using the same virtual address with the same properties in two separate page tables, which are accessed using two separate ASIDs. Even though the page</description><dc:language>en-US</dc:language><generator>Telligent Community 10</generator><item><title>RE: Duplicate globally-mapped Micro TLB entries</title><link>https://community.arm.com/thread/2149?ContentTypeID=1</link><pubDate>Wed, 11 Sep 2013 11:02:15 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:857e9ba9-8ac3-4e83-b24c-bd21a9a3fd0f</guid><dc:creator>Peter Harris</dc:creator><description>&lt;div&gt;&lt;i&gt;Note: This was originally posted on 3rd November 2010 at &lt;a href="http://forums.arm.com"&gt;http://forums.arm.com&lt;/a&gt;&lt;/i&gt;&lt;br /&gt;&lt;br /&gt;&lt;span&gt;Given that the finest granularity of an MMU page is 4KB (or 1KB if you are on an ARMv5 core), and in either case the bottom 12 or 10 bits of the VA and the PA must match, it seems strange that you have addresses which are not 1KB or 4KB aligned, and in no case have bottom bits which match. &lt;/span&gt;&lt;br /&gt;&lt;br /&gt;&lt;span&gt;So, your data looks wrong to me. How are you taking these measurements, and on what platform?&lt;/span&gt;&lt;/div&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Duplicate globally-mapped Micro TLB entries</title><link>https://community.arm.com/thread/2148?ContentTypeID=1</link><pubDate>Wed, 11 Sep 2013 11:02:14 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:7c7401cf-0f11-4049-9b95-8a21a08aec9b</guid><dc:creator>Duplicate Christoffer Dall</dc:creator><description>&lt;div&gt;&lt;i&gt;Note: This was originally posted on 3rd November 2010 at &lt;a href="http://forums.arm.com"&gt;http://forums.arm.com&lt;/a&gt;&lt;/i&gt;&lt;br /&gt;&lt;br /&gt;&lt;span&gt;The measurements are taken using the TLB VA, PA and Attribute registers in CP15. The system is an arm1136 (specifically an HTC Dream device with an MSM 7200 series core.&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;&lt;span&gt;ARM DDI 0211K (see pages 3-196 to 3-209) specifies the formats of those registers, and specifically for the VA, the format is that bits [31:10] give you the address and bit 9 is set for global entries and clear for non-global - in the latter case bits [7:0] gives the ASID.&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;&lt;span&gt;The G (global) and ASID columns are just extracted bits from the VA column.&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;&lt;span&gt;Equally, the PA field contains the AP and valid bits amongst others in the least significant bits.&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;&lt;span&gt;The pages under 0xffff are all 4KB small pages.&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;&lt;span&gt;Thanks.&lt;/span&gt;&lt;/div&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>