How JTAG take control of ARM core?

Note: This was originally posted on 29th July 2010 at http://forums.arm.com

Hello,

I have a question from customer regarding how to disable JTAG in their final product to prevent their application code from explosion from JTAG interface.

Since I am not familiar with JTAG debug module and ARM core interaction mechanism, I would like to know if there is any document talking about the JTAG debug detail procedure.

(1) We have a plan to disable the JTAG port during reset stage of the MCU, and enable it with the built-in ROM code in certain stage. I am not sure if it is workable, any attention needed?

(2) Is the system reset a must when entering JTAG debug mode? If not, please help explain the detail procedure on how JTAG take control of core.


Thanks a lot!
Parents
  • Note: This was originally posted on 30th July 2010 at http://forums.arm.com

    Which processor?
    Are you referring to doing your own SoC design?
    regards,
    joseph


    That 's a question form customer, which raise my personal interest. I would like to know the details on how the JTAG debug is working with interaction with ARM core, but still have difficluty to find some related documents on it.

    Thanks!
Reply
  • Note: This was originally posted on 30th July 2010 at http://forums.arm.com

    Which processor?
    Are you referring to doing your own SoC design?
    regards,
    joseph


    That 's a question form customer, which raise my personal interest. I would like to know the details on how the JTAG debug is working with interaction with ARM core, but still have difficluty to find some related documents on it.

    Thanks!
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