Arm Community
Site
Search
User
Site
Search
User
Groups
Arm Research
DesignStart
Education Hub
Graphics and Gaming
High Performance Computing
Innovation
Multimedia
Open Source Software and Platforms
Physical
Processors
Security
System
Software Tools
TrustZone for Armv8-M
中文社区
Blog
Announcements
Artificial Intelligence
Automotive
Healthcare
HPC
Infrastructure
Innovation
Internet of Things
Machine Learning
Mobile
Smart Homes
Wearables
Forums
All developer forums
IP Product forums
Tool & Software forums
Support
Open a support case
Documentation
Downloads
Training
Arm Approved program
Arm Design Reviews
Community Help
More
Cancel
Developer Community
Tools and Software
Software Tools
Jump...
Cancel
Software Tools
Arm Development Studio forum
Problem with CPU Data cache
Tools, Software and IDEs blog
Forums
Videos & Files
Help
Jump...
Cancel
New
Replies
2 replies
Subscribers
126 subscribers
Views
2242 views
Users
0 members are here
Related
Problem with CPU Data cache
Offline
virupax virupax
over 7 years ago
Note: This was originally posted on 15th December 2009 at http://forums.arm.com
Hi
I am using arm926ej-S processor and using the linux 2.6.27 kernel. If i enable the cpu DCACHE then the kernel is not booting up.
Can some one tell me is this because of some issue with the processor. I am using at91sam9g20 controller.
Is there some test application or test method which can be used to test internal data cache of the processor, to check is there is some problem with the processor's internal data cache.
Thanks
Virupax
Offline
virupax virupax
over 7 years ago
Note: This was originally posted on 16th December 2009 at
http://forums.arm.com
sim
Thank you for the reply.
I am disabling the data cache in the kernel source code where it is getting enabled, in other words i am changing the kernel source code not to enable the data cache.
There are two places(which i have found) in the linux kernel source code where the data cache is being enabled.
1) The "arch/arm/boot/compressed/head.S" which is used for decompressing the kernel and here i have changed the code manually to not to enable the data cache.
writing #0x0009 instead of #0x000d to the c1 register of the cp15.
2) The "arch/arm/kernel/head.S" file and for this the CONFIG_CPU_DCACHE_DISABLE kernel config option is sufficient to disable the data cache enabling.
If i dont do the first one , i get
Uncompressing Linux.............................................................
................................................
crc error
-- System halted
and if the first change is done and the seconds one is not done, then the kernel boots up but fails to mount the RFS. On doing both changes the kernel boots up fine with the RFS.
I feel like data chache disabling is needed only at places where there is some king of data decompression is there.
I am seeing this issue on only one board. I have several other boards on which the kernel works fine.
I am not been able to make the issue is because of the bad controller(9G20) or Processor ( arm926ej-S) or the peripherals connected to the controller( like SDRAM).
Any ideas will be helpful.
Thanks
Cancel
Up
0
Down
View discussion
Cancel
Offline
Simon Craske
over 7 years ago
Note: This was originally posted on 15th December 2009 at
http://forums.arm.com
It's not clear whether you are enabling the cache within the Linux build, or before entering the kernel.
Either way, it's probably worth reading [url="
http://www.arm.linux.org.uk/developer/booting.php
"]
http://www.arm.linux.org.uk/developer/booting.php[/url]
hth
s.
Cancel
Up
0
Down
View discussion
Cancel
More questions in this forum
By title
By date
By reply count
By view count
By most asked
By votes
By quality
Descending
Ascending
All recent questions
Unread questions
Questions you've participated in
Questions you've asked
Unanswered questions
Answered questions
Questions with suggested answers
Questions with no replies
Not Answered
Forum FAQs
0
ARM Community
2521
views
0
replies
Started
1 month ago
by
Annie Cracknell
Not Answered
Use Arm DS5 streamline performance analyzer on TX2
0
1070
views
4
replies
Latest
3 days ago
by
ShirB
Not Answered
index are changing with the voltage apply to the adc
0
219
views
0
replies
Started
3 days ago
by
Vishal_Patel
Not Answered
Extended asm alternative for Arm Compiler 5 (memory barriers)
0
Memory Management Unit (MMU)
Arm Assembly Language (ASM)
Arm Compiler 5
225
views
0
replies
Started
6 days ago
by
StoneCold
Not Answered
Problem with arm_cmplx_mag_f32()
0
892
views
2
replies
Latest
11 days ago
by
Vishal_Patel
>
View all questions in Arm Development Studio forum