I'm trying to verify if memory tagging works in Cortex-A76. I compiled the code with memory tagging enabled and successfully got the following disassembly that contains tag manipulation instructions.
The program can be executed before IRG instruction, however, once executing the tag manipulation instruction, an exception raised.
I've set the TBI bit of register TCR_EL1, TCR_EL2 and TCR_EL3 in the start-up code to enable the top-byte ignore, but the tag manipulation instruction still cannot be executed. May I ask how to execute the tag manipulation instructions?
After executing IRG instruction, the exception "Synchronous exception within EL3 with EL3 stack pointer" raised.
Hi HarperThe Cortex-A76 doesn't support the Memory Tagging Extension (MTE) "ARMv8.5-MemTag", so an undefined instruction exception is occurring.You can use the Armv8-A Base RevC AEM FVP model instead. You can download this from developer.arm.com/.../arm-ecosystem-modelsMTE support is identified by the MTE bit in the ID_AA64PFR1_EL1 register (which the A76 TRM doesn't define and so is RES0). Programs should normally test this bit before using any MTE instructions.To enable MTE support, you'll need to launch the model with e.g.:FVP_Base_RevC-AEMv8A -C cluster0.has_arm_v8-5=1 -C cluster0.memory_tagging_support_level=2 -C bp.dram_metadata.is_enabled=1The last parameter needs to be enabled for the memory system to support storing MTE tags.For more info on these switches, see the output of:FVP_Base_RevC-AEMv8A --list-paramsAs I mentioned before, for other Models-specific questions, there is a "Simulation Models" forum at community.arm.com/.../simulation-modelsStephen