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Debugging a Usage Fault for an unaligned memory access
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Debugging a Usage Fault for an unaligned memory access
Offline
Brown Bud
over 7 years ago
Hi,
I am experiencing a hard fault in Cortex M3 and bit#30 FORCED is set in the Hard Fault Status Register (0xE000ED2C). Referring to the Cortex M3 Technical Reference Manual:
[color="#0000FF"]
[30] FORCED
Hard Fault activated because a Configurable Fault was received and cannot activate because of priority or because the Configurable Fault is disabled. The Hard Fault handler then has to read the other fault status registers to determine cause.[/color]
The value in the Configurable Fault Status Registers (0xE000ED28) is 0x01000000 which means that the bit#8 UNALIGNED is set in the Usage Fault Status Register (0xE000ED2A) . Again referring to the Cortex M3 Technical Reference Manual:
[color="#0000FF"]
[8] UNALIGNED
When UNALIGN_TRP is enabled (see Configuration Control Register on page 8-25), and there is an attempt to make an unaligned memory access, then this fault occurs. Unaligned LDM/STM/LDRD/STRD instructions always fault irrespective of the setting of UNALIGN_TRP.[/color]
The value in the Configuration Control Register (0xE000ED14) is 0x00000200 which means that only bit#9 STKALIGN is set.
After reading through the relevant topics in this forum, I added the following code snippet to narrow down the problem.
[font="Courier New"]void hard_fault_handler_c(unsigned int * hardfault_args)
{
unsigned int stacked_r0;
unsigned int stacked_r1;
unsigned int stacked_r2;
unsigned int stacked_r3;
unsigned int stacked_r12;
unsigned int stacked_lr;
unsigned int stacked_pc;
unsigned int stacked_psr;
stacked_r0 = ((unsigned long) hardfault_args[0]);
stacked_r1 = ((unsigned long) hardfault_args[1]);
stacked_r2 = ((unsigned long) hardfault_args[2]);
stacked_r3 = ((unsigned long) hardfault_args[3]);
stacked_r12 = ((unsigned long) hardfault_args[4]);
stacked_lr = ((unsigned long) hardfault_args[5]);
stacked_pc = ((unsigned long) hardfault_args[6]);
stacked_psr = ((unsigned long) hardfault_args[7]);
printf ("[Hard fault handler]\n");
printf ("R0 = %x\n", stacked_r0);
printf ("R1 = %x\n", stacked_r1);
printf ("R2 = %x\n", stacked_r2);
printf ("R3 = %x\n", stacked_r3);
printf ("R12 = %x\n", stacked_r12);
printf ("LR = %x\n", stacked_lr);
printf ("PC = %x\n", stacked_pc);
printf ("PSR = %x\n", stacked_psr);
printf ("BFAR = %x\n", (*((volatile unsigned long *)(0xE000ED38))));
printf ("CFSR = %x\n", (*((volatile unsigned long *)(0xE000ED28))));
printf ("HFSR = %x\n", (*((volatile unsigned long *)(0xE000ED2C))));
printf ("DFSR = %x\n", (*((volatile unsigned long *)(0xE000ED30))));
printf ("AFSR = %x\n", (*((volatile unsigned long *)(0xE000ED3C))));
while(1);
}
__asm void Hard_Fault_Handler(void)
{
IMPORT hard_fault_handler_c
TST LR, #4
ITE EQ
MRSEQ R0, MSP
MRSNE R0, PSP
B hard_fault_handler_c
}[/font]
However, I am still not able to figure out and point out the instruction which is causing the issue
.
Any help will be very much appreciated. I can provide more information if needed.
Thank you
.
Regards,
Parents
Offline
Joseph Yiu
over 7 years ago
Note: This was originally posted on 10th May 2010 at
http://forums.arm.com
If the value of SP is not in valid memory range, then printf might not work because it will need stack memory. But since you are working on a board without any printf support, maybe it would be easier just to try to located the stacked PC manually:
1) Look at LR value when the core enter hardfault, if bit 2 is 0, then read the value of MSP. Otherwise, read the value of PSP.
2) Based on the MSP/PSP value, you should be able to locate the start of stack frame, stacked PC is in address SP+24.
3) Generate a disassembled listing of the program you run, and try locate the stack PC address in the disassembled program list.
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Offline
Joseph Yiu
over 7 years ago
Note: This was originally posted on 10th May 2010 at
http://forums.arm.com
If the value of SP is not in valid memory range, then printf might not work because it will need stack memory. But since you are working on a board without any printf support, maybe it would be easier just to try to located the stacked PC manually:
1) Look at LR value when the core enter hardfault, if bit 2 is 0, then read the value of MSP. Otherwise, read the value of PSP.
2) Based on the MSP/PSP value, you should be able to locate the start of stack frame, stacked PC is in address SP+24.
3) Generate a disassembled listing of the program you run, and try locate the stack PC address in the disassembled program list.
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