Large Physical Address Extension

Note: This was originally posted on 19th November 2012 at http://forums.arm.com

Hi,

Can some body explain me about the Large Physical address extension in ARM ? i.e How it is implemented ? What are the registers that are invloved?
what about the page tables?
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  • Note: This was originally posted on 20th November 2012 at http://forums.arm.com

    The total addressable for one process is still 4GB at a time, but multiple processes can each use a different part of the physical memory unless they are sharing data. The overall system can therefore utilize the full 40-bits of physical memory.
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  • Note: This was originally posted on 20th November 2012 at http://forums.arm.com

    The total addressable for one process is still 4GB at a time, but multiple processes can each use a different part of the physical memory unless they are sharing data. The overall system can therefore utilize the full 40-bits of physical memory.
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