TCM alternative in A15

Note: This was originally posted on 19th October 2012 at http://forums.arm.com

Hi

We want to use an A15 core for some packet processing function with a really high throughput. This means that  every packet is going to cause a cache miss if we use the regular caching mechanism.
In order to avoid that, we could two things

1. Use TCMs. But these are not present in the Cortex A series. Does anyone know an alternative to this that A15 supports?
2. Stash the data directly into the L1 cache. But I could not find any information whether this is possible.

Can any one suggest what would be the best way to achieve this high throughput packet processing using A15?

Thanks
Sundeep
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