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<?xml-stylesheet type="text/xsl" href="https://community.arm.com/utility/feedstylesheets/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/"><channel><title>Cortex-A9 CPSR I Flag unmask problem</title><link>https://community.arm.com/developer/tools-software/tools/f/armds-forum/1042/cortex-a9-cpsr-i-flag-unmask-problem</link><description> </description><dc:language>en-US</dc:language><generator>Telligent Community 10</generator><item><title>RE: Cortex-A9 CPSR I Flag unmask problem</title><link>https://community.arm.com/thread/3202?ContentTypeID=1</link><pubDate>Wed, 11 Sep 2013 11:07:22 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:6c20748e-8645-4245-8182-235c1e317f29</guid><dc:creator>Simon Craske</dc:creator><description>&lt;div&gt;&lt;i&gt;Note: This was originally posted on 17th July 2012 at &lt;a href="http://forums.arm.com"&gt;http://forums.arm.com&lt;/a&gt;&lt;/i&gt;&lt;br /&gt;&lt;br /&gt;&lt;code&gt;CPSIE i&lt;/code&gt;&lt;/div&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Cortex-A9 CPSR I Flag unmask problem</title><link>https://community.arm.com/thread/3200?ContentTypeID=1</link><pubDate>Wed, 11 Sep 2013 11:07:21 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:ba011208-54dd-4c20-ab38-3beebbc4ef36</guid><dc:creator>Martin Weidmann</dc:creator><description>&lt;div&gt;&lt;i&gt;Note: This was originally posted on 18th July 2012 at &lt;a href="http://forums.arm.com"&gt;http://forums.arm.com&lt;/a&gt;&lt;/i&gt;&lt;br /&gt;&lt;br /&gt;&lt;span&gt;Just sanity checking....&amp;#160; &amp;quot;CPSID i&amp;quot; will set the CPSR.I bit which disables (not enables) interrupts.&amp;#160; Is that what you meant?&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;&lt;span&gt;Have you checked what address is in the LR_abt and pattern in SPSR_abt?&amp;#160; If it is a data abort you probably also want to check the CP15 DFSR and DFAR.&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;&lt;span&gt;Best guess... the &amp;quot;CPSIE i&amp;quot; succeeds and an IRQ is immediately taken.&amp;#160; The IRQ handler triggers an Abort - hence ending up in abort mode.&amp;#160; &lt;/span&gt;&lt;br /&gt;&lt;br /&gt;&lt;span&gt;NOTE: Taking any exception will cause the CPSR.I bit to be set.&amp;#160; So if an abort or IRQ is being taken, it would be expected that the CPSR.I bit gets set again.&lt;/span&gt;&lt;/div&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Cortex-A9 CPSR I Flag unmask problem</title><link>https://community.arm.com/thread/3197?ContentTypeID=1</link><pubDate>Wed, 11 Sep 2013 11:07:21 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:53436a84-abca-4289-9707-555b55d14563</guid><dc:creator>Martin Weidmann</dc:creator><description>&lt;div&gt;&lt;i&gt;Note: This was originally posted on 17th July 2012 at &lt;a href="http://forums.arm.com"&gt;http://forums.arm.com&lt;/a&gt;&lt;/i&gt;&lt;br /&gt;&lt;br /&gt;&lt;span&gt;You might want to look at why you ended up in Abort mode.&amp;#160; Attempting to change the CPSR will not directly trigger an abort.&amp;#160; So a couple of likely possibilities are that you&amp;#39;re writing the wrong bit pattern, or that after IRQs there is an abort (in the irq handler for instance).&lt;/span&gt;&lt;/div&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Cortex-A9 CPSR I Flag unmask problem</title><link>https://community.arm.com/thread/3199?ContentTypeID=1</link><pubDate>Wed, 11 Sep 2013 11:07:21 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:874b603f-7ef5-446b-96bd-42020ae65546</guid><dc:creator>Sebastian Meisheit</dc:creator><description>&lt;div&gt;&lt;i&gt;Note: This was originally posted on 19th July 2012 at &lt;a href="http://forums.arm.com"&gt;http://forums.arm.com&lt;/a&gt;&lt;/i&gt;&lt;br /&gt;&lt;br /&gt;&lt;span&gt;Human Error! I didnt read carefully and thought flag = 1 = interrupt enabled.&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;&lt;span&gt;This is exactly what happened:&lt;/span&gt;&lt;br /&gt;&lt;span&gt;Quote by ttfn:&lt;/span&gt;&lt;br /&gt;&lt;blockquote&gt;Best guess... the &amp;quot;CPSIE i&amp;quot; succeeds and an IRQ is immediately taken.&amp;#160;&amp;#160; The IRQ handler triggers an Abort - hence ending up in abort mode.&lt;/blockquote&gt;&lt;br /&gt;&lt;br /&gt;&lt;span&gt;Thanks alot!&lt;/span&gt;&lt;/div&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Cortex-A9 CPSR I Flag unmask problem</title><link>https://community.arm.com/thread/3198?ContentTypeID=1</link><pubDate>Wed, 11 Sep 2013 11:07:21 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:6db650e0-c2cc-4199-aed8-91dbb939f7cc</guid><dc:creator>Sebastian Meisheit</dc:creator><description>&lt;div&gt;&lt;i&gt;Note: This was originally posted on 18th July 2012 at &lt;a href="http://forums.arm.com"&gt;http://forums.arm.com&lt;/a&gt;&lt;/i&gt;&lt;br /&gt;&lt;br /&gt;&lt;span&gt;Thanks for the adwise but the way i try to unmask the I flag should be correct.&lt;/span&gt;&lt;br /&gt;&lt;span&gt;If i use CPSID I to unmask the flag, same scenario: abort mode and I flag still set.&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;&lt;span&gt;Something blocks access to the I flag and i dont know (yet) what does.&lt;/span&gt;&lt;/div&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>