How can I do read vela compiler report ?

I have some problems about his report when using ethous-U-vela.

The vela version I use is 3.0.0 .

This is an introduction to Vela's options:
review.mlplatform.org/.../OPTIONS.md

There is an example of Configuration File in the above website

I would like to ask

1.
There are burst length and latency.

Does the latency in the example refer to memoey's CAS?

Then burst length refers to reading the address once, which can read several strokes continuously.

2.
The three (Sram Only, Shared Sram, Shared Sram) modes that I want to ask the most are whether to adjust the four settings (const_mem_area, arena, cache_mem_area, arena_cache_size)
) Instead of directly setting the model?


3.
The total DRAM MB/batch in the figure below has a value.
But there is no value in the last DRAM access cycle.
What could be the problem?


4.
Finally, I would like to ask about the value of those cycles. (Picture above)
Where can I know the cycle value used by an OP?
I think these values ​​should be calculated after understanding the process of op operation.

Thank you for your answers in advance

Parents
  • Thanks for posting on Arm Technical Forum. Please find the response inline.

    1.

    Read AXI latency is defined as the number of cycles between the accepted read address and the arrival of the corresponding read data.

    Write AXI latency is defined as the number of cycles between the accepted write address and the arrival of the corresponding write response.

    Similarly, DMA (between Ethos_U55 and Cortex_M*) also handles latency hiding and out-of-order burst handling, and for this purpose it will require an internal burst buffer. This handles a run-time configurable number of outstanding bursts as well as configurable maximum burst length.T

    Coming back to setting this up in Vela, this is because these params are used by Vela's performance estimation. Performance estimation is used to determine the optimisations performed

    1. Yes, if you are selecting the memory mode and giving that option that is already defined in the config file as  Vela CLI as 

    --memory-mode My_Mem_Mode

    then you need not to select the rest of the settings explicitly. Please note "My_Mem_Mode" must be provided on your configuration where you are setting AX0/AX1 for const_mem_area, arena, cache_mem_area, arena_cache_size.

    for e.g

    https://review.mlplatform.org/plugins/gitiles/ml/ethos-u/ethos-u-vela/+/refs/heads/master/vela.ini

    1. This needs further investigation. which memory mode you selected ? I need to check your configuration (.ini file) to investigate. might be a bug. 
    2. No, we can’t get the per Op NPU cycles. All the ops falling on Ethos_U55 are packed in a custom op to run on NPU. Active NPU cycle is based on PMU counters.

    Hope this helps. If you are a licence customer of Ethos_U55, please send your issue (3) and others to support-ml support-ml@arm.com.

     

    Thanks,

    Sandeep Singh

Reply
  • Thanks for posting on Arm Technical Forum. Please find the response inline.

    1.

    Read AXI latency is defined as the number of cycles between the accepted read address and the arrival of the corresponding read data.

    Write AXI latency is defined as the number of cycles between the accepted write address and the arrival of the corresponding write response.

    Similarly, DMA (between Ethos_U55 and Cortex_M*) also handles latency hiding and out-of-order burst handling, and for this purpose it will require an internal burst buffer. This handles a run-time configurable number of outstanding bursts as well as configurable maximum burst length.T

    Coming back to setting this up in Vela, this is because these params are used by Vela's performance estimation. Performance estimation is used to determine the optimisations performed

    1. Yes, if you are selecting the memory mode and giving that option that is already defined in the config file as  Vela CLI as 

    --memory-mode My_Mem_Mode

    then you need not to select the rest of the settings explicitly. Please note "My_Mem_Mode" must be provided on your configuration where you are setting AX0/AX1 for const_mem_area, arena, cache_mem_area, arena_cache_size.

    for e.g

    https://review.mlplatform.org/plugins/gitiles/ml/ethos-u/ethos-u-vela/+/refs/heads/master/vela.ini

    1. This needs further investigation. which memory mode you selected ? I need to check your configuration (.ini file) to investigate. might be a bug. 
    2. No, we can’t get the per Op NPU cycles. All the ops falling on Ethos_U55 are packed in a custom op to run on NPU. Active NPU cycle is based on PMU counters.

    Hope this helps. If you are a licence customer of Ethos_U55, please send your issue (3) and others to support-ml support-ml@arm.com.

     

    Thanks,

    Sandeep Singh

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