I am using Linaro's Android release on Juno r1 and trying to make use of performance monitor. I want to use the PMU to count each retired instruction in a specific application, however, the overflow interrupt of PMU makes me a little confused. When the performance counter reaches its maximum value(0xffffffff), a overflow interrupt will be generated after the next instruction is retired. Also, the counter should be 0 after the next instruction is retired. In my case, the overflow interrupt is configured to be secure interrupt. However, when the interrupt arrives in EL3, i found that the value of performance counter is a small value instead of 0. As i configured the PMU to count the retired instructions in non-secure EL0 only, I guess the non-zero value of PMU means that the interrupt is generated in an asynchronous manner. When the PMU of processor A overflows, it signals a interrupt request to the GIC. But before the GIC actually asserts the interrupt to the processor A, the processor A is still executing instructions of the application.
Is there anyway to make it synchronous? After the processor signals the interrupt request, i hope it will wait for the interrupt instead of continuing executing other instructions.
Thanks very much for any help!
I am afraid the answer is - no. The processor will signal the interrupt to the GIC, the GIC will send the interrupt to the core (subject to priority/enable/preemption checks), and the core will take the interrupt (subject to masks). This means there will be some latency between the overflow and entry to the handler.
The core can't wait for the interrupt, as it might never arrive. For example, the PMU might overflow during the handling of a higher priority interrupt. The PMU interrupt then couldn't preempt the interrupt already being handled, so you'd be stuck.
However, you can work out what this "skid" is by looking at how far the count has progressed.
Thanks so much for your reply, i will try to find some other approaches to figure out the problem.
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