<?xml version="1.0" encoding="UTF-8" ?>
<?xml-stylesheet type="text/xsl" href="https://community.arm.com/utility/feedstylesheets/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/"><channel><title>Dhrystone on Cortex R52x2 (MPS3 board) TCM memory. Cached/uncached</title><link>https://community.arm.com/developer/tools-software/oss-platforms/f/dev-platforms-forum/48061/dhrystone-on-cortex-r52x2-mps3-board-tcm-memory-cached-uncached</link><description> Hi, 
 
 As per the defination of TCM, it shoudn&amp;#39;t be affected by cached or uncached. 
 But while running Dhrystone using TCM, i am getting different values for it. 
 
 cached = 10245675 ticks 
 uncached = 26001084 ticks 
 
 Why is this behaviour happening</description><dc:language>en-US</dc:language><generator>Telligent Community 10</generator><item><title>RE: Dhrystone on Cortex R52x2 (MPS3 board) TCM memory. Cached/uncached</title><link>https://community.arm.com/thread/169146?ContentTypeID=1</link><pubDate>Tue, 15 Dec 2020 06:59:57 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:18c7f38e-f479-4ad5-8258-858620fa516a</guid><dc:creator>Zhifei Yang</dc:creator><description>&lt;p&gt;We may need more details and background info to understand it.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>