I'm a student and I'm about to begin the development of a software module to support MPAM on an ARM system.
I was willing to test the software on an fvp platform, but I'm not able to find any reference about the memory address of the MPAM memory mapped register (the MPAM manual suggests to look for the MPAMF_BASE frame).
The only time I can find MPAM mentioned is in the Fast models reference manual (https://static.docs.arm.com/100964/1110/fast_models_rm_100964_1110_00_en.pdf?_ga=2.167951329.1357000934.1588783458-1864304680.1586344601) but all the occurrencies look related to the configuration of the platform. Furthermore, MPAM is also never mentioned in the memory maps that can be fonud about fvp.
Where can I find the documentation about those addresses?
Thank you and best regards.
Ok, after three days, I found something close to a partial answer.
When using the base model, the available configurable parameters can be listed executing the model with the --list-params argument, as stated by the reference manual (static.docs.arm.com/.../fast_models_fvp_rg_100966_1110_00_en.pdf.
Among them, there are actually more parameters than the ones listed in the document linked in the previous post. One of them is the mpamf_base address for the L3 cache.
I'm not sure whether it is the only component that exposes an MPAM interface in the system or not. Any clarification on this point would be welcome.
MPAM is a feature of Arm Architecture v8.4A:https://developer.arm.com/-/media/Arm%20Developer%20Community/PDF/Learn%20the%20Architecture/Understanding%20the%20Armv8.x%20extensions.pdfAnd so the FVP should be put into v8.4A 'mode'. See the below thread for a similar solution to put into v8.3A:https://community.arm.com/developer/tools-software/oss-platforms/f/dev-platforms-forum/46401/enabling-pointer-authentication-on-arm-fvp-baseRegardsRonanPS please note there is a dedicated forum for questions related to FVPs and other virtual platforms from Arm:https://community.arm.com/developer/tools-software/f/simulation-models
Hi Matteo, MPAM has system-wide implications, beyond the processor model, As Ronan indicates, the AEM (the Armv8-A model) in Base can be parameterized to support MPAM. However, to fully support, the interconnect, SMMU and GIC also need to be considered. I am working with the development teams to provide a complete answer on whether the Base FVP is sufficient for this or if a different FVP is required.
Thank you for your replies.
About the arm version, the reference manual states that setting has_mpam=2 forces the activation of MPAM regardless of the ARM version. Is it correct? I tried with this solution and the PE configuration part seems to work correctly.
I'm sorry if this is not the correct place for the question, I didn't see the other section. Can the question be moved?
Certain features of the Arm architecture can be be "cherry picked" back to versions of the specification prior to the one where they were introduced. MPAM was introduced with v8.4 but it can be used with an implementation that is otherwise v8.2. The parameter supports three configurations:
=0, no MPAM
=1, support MPAM, but only it the model is set to implement v8.4 or later
=2, model MPAM and do not enforce the v8.4 requiremt
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