I am running an application for M33 on MPS2+ FPGA Motherboard at default clock 25MHz.
Now I want to increase the clock from 25MHz to Some nMHz, So for that, I went through board details and found clock configuration in MB\HBI0263C\AN505\an505_v4.txt.
So is it right to test an application on the different clock in this way?
Thank you for your question.
Yes you are correct, the board clocks are configured in the an505_v4.txt file in the OSCCLK section. If you refer to section 5.1 of the AN505 Application Note PDF, you will see what the clocks do. The Application Note is designed and tested with the frequencies that you see in the documentation and in the configuration file. The 25MHz clock you mention, OSCCLK is used for the FPGA peripherals. If you adjust the frequency of that, then you would have to adjust the timings in the example software for the UART dividers, SPI clock rate etc as they are expecting 25MHz. Also, be aware that the timing constraints for the FPGA were based on the documented clock values, so if you exceed these then the design is not guaranteed to function.
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