Is there any sample assembly code for entering debug state ARMv8.
Firstly halting debug must be enabled by the authentication interface to the CPU. This is controlled by pins called DBGEN and SPIDEN, and how to do this depends on the security features of your SoC.
You then need enable Halt Debug mode by setting the HDE bit in the EDSCR register. This is done by one of: the memory-mapped debug interface, by the debug access port, or by using the OS Save and Restore mechanism described in the Architecture Reference Manual.
Once this is done, a HLT instruction will put the CPU into Debug state.