aarch64 MMU: inconsistency in ARMv8 ARM?

Hello,

I try to reconfigure the MMU of an existing project. I try to do this by building upon an example of ARMv8 ARM. The example is the one in section K7.1.2, fig. K7-11, page 7293.

I find the information in ARMv8 ARM to be conflicting. In fig. K7-11 I can see the level 3 page descriptor using bits 12-16 for the OA (output address). But in fig. D5-15, section D5.3.1, page 2445, these bits are used for something else (field nT and a 4-bit RES0).

Please, tell me which one is correct. The example is more logical, because bits 12-16 make the OA have the right size.

Regards,

Dumitru

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