Can I manually flush the GPU cache in OpenCL kernel code?

Hi all,

I am playing with Mali T624 and OpenCL. By playing the kernel-space midgard driver, I am now able to access some I/O memory in the OpenCL kernel. However, the I/O memory I am accessing is volatile. For example, assume we have a kernel function with a 0x1000 size input buffer. The data at offset 0x10 of the buffer would change after each read (each read returns a different value), and I attempt to read 10 times from the offset (would get 10 different values in my expectation). The problem is that the GPU caches the data at the offset, and each read to the offset always returns the same value. So, is there any way to manual flush the GPU cache in the OpenCL kernel code?

Thanks for any help and discussion!

Best Regards,

Zhenyu

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  • Do you happen to know the reason for the incorrect result?

    Not tested, but try 0x4C.

    Note that the GPU isn't designed to talk to IO peripherals so all memory accesses are treated as "normal" memory in the Arm architecture point of view, where as you really want device or strongly ordered memory when talking to a peripheral.

    There is a high probability that this won't work, even with uncached memory, as the hardware can legally drop writes which are overwritten by later writes, change access size, etc. These are all valid optimizations for "normal" memory, but invalid when talking to a physical peripheral.

    Pete

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