• Parasitic Extraction Tips for Advanced Nodes

    As use of advanced node technologies (FinFET specifically) ramp, more designers are confronting challenges in technology, productivity, and time to market. To get a sense for what engineers need to know about advanced nodes, FinFETs, and parasitic extraction…

  • Software’s Growing Role in Semiconductor Ecosystems

    Two very different analysts stress the importance of software in chip and server ecosystems.

    Last week, veteran semiconductor electronic design automation (eda) analyst garysmith made the following observation about ecosystems in his annual Design Automation…

  • Core Pattern Conversion for SoC Test: Beware of the 'Poison Perl'

     Bringing test patterns for your ARM core or other core-level blocks together for chip-level test of your SoC can present significant challenges. Whether your core-level test patterns are scan-based or functional, eventually they will likely end up in…