• Exception handlers and interrupt

    Hi All,

            i went through this link

    http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0471g/BABGCFHB.html

    and related a53 vector table implementation.

    in this regard, i have a question

    1. Say a processor gets stuck in exception handler due…

  • Cortex-A5 sets instr_pc to 0x00000008 after enabling MMU and using high exception vectors

    Hello Community,

    in our current ASIC project we have to replace an ARM926EJ-S with a Cortex-A5.

    In the moment we are facing the following problem in our bootloader:

    We intend to use the high exception vectors after reset (input vinithi is tied fix to '1…

  • Booting sama5d2 with lpddr2

    I'm having a SAMA5D26C with a LPDDR2 EDB1332BDBH-1. The CPU boots successfully ROMBOOT and is able to load at91bootstrap from QSPI memory. I get debug output from at91bootstrap, but I fail to load linux.

    Investigating this further show me that the…

  • ARMv7-A - Power to the People

    Recently, I wrote an article called “Navigating the Cortex Maze” (Navigating the Cortex Maze) That was intended as an easy way-in to the ARM processor range, covering Cortex-A (architecture ARMv7-A), Cortex-R (ARMv7-R) and Cortex-M (ARMv7…