• Loop optimization ARM compiler flag in DS-5

    I am trying to use the --loop_optimization_level=opt flag with ARM compiler in DS-5 (Version 5.13). I am using the -03 and -0time flags. I am getting an error when I build my project. How do I pass the loop optimization flag in DS-5?

  • How to use Cortex-a53 FVP for AArch32 platform in DS-5?

    Hi all,
    I have downloaded Cortex-A53 FVP (Version-10.2). I am able to run code on AArch64 platform in DS-5 simulator. How to use this Cortex-A53 FVP to run on AArch32 ? What are the required settings for this? Can anyone help me on this.

    Thanks,
    Divya.

  • LD_RETIRED , ST_RETIRED Events not working

    Hi,

    I am tyring to get load count , store count and instrucion count  in AArch64 DS-5 by using ARM64 PMU Events LD_RETIRED , ST_RETIRED and INST_RETIRED.

    I am able to get instruction count , but not load and store count, please find the code and enums i used…

  • where are the C++  libraries for linux app?

    I have an Altera Cyclone V SoC DevKit that came with the ARM DS-5 tools.  I have been running the Hello World C linux app examples that came with the tools.  I want to run a similar C++ linux app example, so I copied the C example project (as I have several…

  • Partial Word Access to Altera Avalon Memory-Mapped Slave

    when I say partial word access, I mean 16-bit (two byte) or 8-bit (byte) read/write.

    Background:

    In one of our recent projects, Cyclone V SoC is used to replace 386 CPU in an existing product.

    I am responsible for the board and FPGA design. Another software…

  • AMP system on Cortex-A9. How to do it?

    Hello everyone. I'm trying to understand how to create and make work two separate baremetal programms on two cores of cortex-a9. I'm using Cyclone V SoC. DS-5, arm compiller 5, DE1-SoC board by terasic. I already understand how to work with main core…

  • Import SOC design in eclipse

    I have design SOC in system canvas  . its build successfully on ISIM and cadi target but when I import in DS Eclipse  it shows error

     I am adding.exe file  

  • Licensing FVP models

    Hi

    Sorry for such a basic question. Am just a newbie in ARM world.
    While purchasing the FVP model for specific Cortex-R series, does we need to purchase the licence for ARM 6.04 compiler also. Or it comes with the FVP model ???