• outsanading behaviour in AXI Vs memory latency

    I am trying to implement the axi outstanding feature in CPP, i tried to search if there is already a model in CPP, did not find alot. Is there such model ? If not, Is there any diff in terms of READ and WRITE when it comes to outstanding ?

    In additional…

  • Basic Understanding for AXI WRITE INCR

    Hello , 

    I am new to AXI protocol. Though I have read the document of AXI , but have some doubts on it. I have made run a write sequence (only from AXI to get the better understanding ) Please have a look at the following waveform.

    In this diagram …

  • Additional Control Information Questions

    Hi. I recently got the ARM AMBA specification in my work, and now I am learning stuffs. But the Additional control information got me stuck for a day haha

    My questions are

    1. What is the reason to use the Cacheable bit in the Cache support? I wish I…