How to handle below scenario ?
I have several questions about barrier operarions.
1. how to operate barrier instructions ISB, DMB, DSB in ACE?
a) when ISB is executed, what are the signal values about barrier transaction (AxBAR, AxSNOOP , AxDOMAIN)?
…
Hi,
I am reading ACE protocol and i am confused about when to use cache maintenance transactions. On what basis should i decide when to use cache maintenance transaction and which transaction to be used?
Can anyone please help?
I want to know which transaction should be issued by ACE interface on the channel when a flush/clean request is being processed by the cache?
Can anyone please help.
Regards,
Taniya Garg
From hardware perspective, what's the purpose of WACK and RACK and how does it affect the ACE protocol ?
I can see that the specification says the master issues these two signals to indicate to the interconnect that Write and Read transactions…
The AMBA5 spec for ACE5 shows some new signals versus ACE4 :
VAWQOSACCEPT
VARQOSACCEPT
AWAKEUP
ACWAKEUP
SYSCOREQ
SYSCOACK
How are these used in an SOC system ?
For example, I think but I'm not usre if VAWQOSACCEPT, VARQOSACCEPT is output by each slave…
Hi ARM/arktos,
Seems like this online discussion is not working properly.
I ask a question, you reply, and if I reply the discussion tool doesn't echo back my reply by email.
So most likely you may not see it.
Below is my reply to your answer to my…
1) ARBAR/AWBAR
These two signals are mentioned : ARBAR, AWBAR but in the AMBA5 spec F2.1 Signal Matrix, these signals are listed as "N" (must not be present), page 419 and 420 of 440 pages.
So are these signals used on the ACE5 interface…
If the slave is not able to process read request from master, which response is expected from slave?
Can anyone throw some light on ACE-Lite Slaves
a ) Do they have inbuilt coherent caches? Can they be snooped?
b) What type of ACE-Lite transactions are directed to them and what are the responses?…