• How to access the memory mapped debug registers?

    Now that the funny PABT-behaviour is found to be (probably) caused ny debug state, I'd like to exit debug state before return from PABT exception. The ARM v7-A/R ARM says that I should write RRQ to DBGDRCR, but it seems that in Cortex-A7 it's not accessible…

  • What's wrong when watchpoint doesn't watch?

    I've been trying to get a watchpoint to trigger, but no luck.

    There should be 4 watchpoints accordíng to DBGDIDR, DBGDSCR=0x0204000e, so there shouldn't be any problems there?

    I use (just in case) the cp14 interface - write DBGWVR0 and DBGWCR0…

  • How can I tell which breakpoint/watchpoint triggered (Cortex-A7)

    In a Cortex-A7 is there a register that shows which breakpoint or watchpoint has triggered a debug event?

    Or what's the usual way to find out?

    I understand that DFSR FS tells if the DABT took place due to debug event (IFSR for PABT) and MOE in DBGDSCR…