• by which instruction the secondary core is triggered while starting the secondary cpu

    the booting of seconday cpu is initiated by the primary core. and some work is completed on the primary cpu and some is completed on the secondary cpu to complete the hotplug operation for cpu_up.

    I am trying to find the exact instruction that is executed…

  • does ARM v8 bus architecture & related IPs be compatible with v7 core?

    I would like to get some confirmation that if we replace A53/A72 with A7/A9 while the SoC architecture is still based on ARM v8 bus & IPs (e.g. CCI400, NIC400, TZC400, GIC500, BP141), does such design feasible and workable?