can any1 explain me completion response and ordering in chi protocol??? and any good and easy source to understand chi protocol except spec..????

Hi,

I was reading the CHI architecture specification but there is no mention of electrical characteristics such as

the clock frequency for the CHI interface.

What is the max and min frequency for CHI interface ?

Thanks,

David

Hi,

I assume CHI needs to either pipeline or implement something like the AXI register slice to support long distance connections.

Please confirm and where can I find relevant information for this topic.

Thanks,

David

Hi,

I'm trying to build an IP to interface to CHI.

Where to download CHI protocol interface checkers (written in SVA) ?

Where to find a CHI testbench to stimulate the various CHI related interfaces : SN_F_I, RN_I, RN_D_F (Slave Node fully coherent…

In chapter 4.9.2 At the ICN(HN-F) node CHI specification talks about what ICN should do when there is hazard condition. It says:

One example of these rules is chapter 5.6.1 CopyBack-Snoop hazard at RN-F, Figure 5-22 CopyBack-Snoop hazard at RN-F exa…

The purpose of Exclusive Access is to read, calculate and modify a cache line atomically. The built-in Atomic Transactions can do some basic calculations at ICN or SN, but if more complex operations are necessary, Exclusive Access is needed.

CHI specification…

I have a custom accelerator to be integrated with Corelink CMN-600. The CMN-600 has a CHI/ ACE-Lite Interface. How can I add a CHI/ ACE-Lite Interface to my custom accelerator? Is there a tool which can generate the RTL for CHI/ ACE-Lite?