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<?xml-stylesheet type="text/xsl" href="https://community.arm.com/utility/feedstylesheets/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/"><channel><title>L4 cache in N1 SDP SoC</title><link>https://community.arm.com/developer/ip-products/system/f/soc-design-forum/47921/l4-cache-in-n1-sdp-soc</link><description> Hi All, 
 I am running my Linux workload on N1 SDP. According to N1 SDP documentation the SoC includes L1, L2 and L3 cache. 
 When I run lstopo command, I got information about 8MB L4 cache. 
 However when I read CLIDR_EL1 control register, I get 0xc3000123</description><dc:language>en-US</dc:language><generator>Telligent Community 10</generator><item><title>RE: L4 cache in N1 SDP SoC</title><link>https://community.arm.com/thread/168465?ContentTypeID=1</link><pubDate>Thu, 05 Nov 2020 09:52:55 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:6d2a8998-ed73-4d35-bd71-d19c7a2196d4</guid><dc:creator>Oliver Beirne</dc:creator><description>&lt;p&gt;Hi again Pawel&lt;/p&gt;
&lt;p&gt;I have moved your thread to the SoC forum.&lt;/p&gt;
&lt;p&gt;Thanks&lt;/p&gt;
&lt;p&gt;Oli from the Community team&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: L4 cache in N1 SDP SoC</title><link>https://community.arm.com/thread/168336?ContentTypeID=1</link><pubDate>Wed, 28 Oct 2020 10:53:41 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:7d0bc526-a5e1-4859-a736-d53b0c336f00</guid><dc:creator>Oliver Beirne</dc:creator><description>&lt;p&gt;Hi Pawel&lt;/p&gt;
&lt;p&gt;Please could you take a look at the forum directory (&lt;a href="/developer/f"&gt;https://community.arm.com/developer/f&lt;/a&gt;) and let me know which forum I can move your question to?&lt;/p&gt;
&lt;p&gt;Thanks&lt;/p&gt;
&lt;p&gt;Oli from the Community team&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>