AXI4 ordering

AXI4 document says that when a master issues multiple transactions to same / overlapping address with same ID, the order of arrival at the slave must be the same as the order of issue.

I think it means if transactions are not for the same address, they can be out of order even if they have same ID.

Is it correct?

If so, when transactions have the same ID how can I distinguish whether transactions are reorderable or not?

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  • The clearest description of this is given in A6.1 in the AXI Spec:

    "The principles are that for transactions with the same ID:

    • transactions to any single peripheral device, must arrive at the peripheral in the order in which they are issued, regardless of the addresses of the transactions

    • memory transactions that use the same, or overlapping, addresses must arrive at the memory in the order in which they are issued."

    I think it means if transactions are not for the same address, they can be out of order even if they have same ID.

    Is it correct?

    If they are to the same peripheral device, then no they must remain in order regardless of the address.  In effect, for an interconnect this would normally mean transactions to the same interface.  If they are to different devices, then they can arrive out of order.  However, the responses must be returned to the original master in the correct order of issue.

    If so, when transactions have the same ID how can I distinguish whether transactions are reorderable or not?

    Each device that handles a transaction will either be aware that the transaction is going to different peripheral (such as an interconnect) and can determine the ordering, or if it isn't aware, then it must maintain the order between the transactions.

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  • The clearest description of this is given in A6.1 in the AXI Spec:

    "The principles are that for transactions with the same ID:

    • transactions to any single peripheral device, must arrive at the peripheral in the order in which they are issued, regardless of the addresses of the transactions

    • memory transactions that use the same, or overlapping, addresses must arrive at the memory in the order in which they are issued."

    I think it means if transactions are not for the same address, they can be out of order even if they have same ID.

    Is it correct?

    If they are to the same peripheral device, then no they must remain in order regardless of the address.  In effect, for an interconnect this would normally mean transactions to the same interface.  If they are to different devices, then they can arrive out of order.  However, the responses must be returned to the original master in the correct order of issue.

    If so, when transactions have the same ID how can I distinguish whether transactions are reorderable or not?

    Each device that handles a transaction will either be aware that the transaction is going to different peripheral (such as an interconnect) and can determine the ordering, or if it isn't aware, then it must maintain the order between the transactions.

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