quiery about AHB burst mode

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SoC Design forum quiery about AHB burst mode

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Offline Harsharaj ellur over 6 years ago

Note: This was originally posted on 19th November 2008 at http://forums.arm.com

hi,

in the AHB burst mode is it the Master that drives consecutive address to slave, or is it that the master only sends the start address and Slave using this, HSIZE and HBURST calculates the next addresses in the burst??

if its the master who is driving consecutive address then why does it also have to send HSIZE and HBURST to slave?

And if it the Slave that is figuring it out asto what the next address in the burst is then why does the Timing diagram show that master is sending the addresses?

AXI4 transaction attributes 0

AMBA 5 CHI Link Layer (L-Credit Return) 0

Is AXI4 Ordered write observation used to support PCIE Producer/Consumer ordering model? 0

BUSY transfer just before the last transfer in a burst by a AHB Master. 0

AMBA AXI reset 0