Arm Community
Site
Search
User
Site
Search
User
Groups
Arm Research
DesignStart
Education Hub
Graphics and Gaming
High Performance Computing
Innovation
Multimedia
Open Source Software and Platforms
Physical
Processors
Security
System
Software Tools
TrustZone for Armv8-M
中文社区
Blog
Artificial Intelligence
Automotive
Healthcare
HPC
Infrastructure
Innovation
Internet of Things
Machine Learning
Mobile
Smart Homes
Wearables
Forums
All developer forums
IP Product forums
Tool & Software forums
Pelion IoT Platform
Activity
Support
Open a support case
Documentation
Downloads
Training
Arm Approved program
Arm Design Reviews
More
Cancel
Developer Community
IP Products
System
Jump...
Cancel
System
SoC Design forum
AHB WRAP address boundaries
Blogs
Forums
Videos & Files
Help
Jump...
Cancel
New
State
Not Answered
Replies
3 replies
Subscribers
71 subscribers
Views
11012 views
Users
0 members are here
AMBA
Bus Architecture
AHB
Related
AHB WRAP address boundaries
Offline
myarm myarm
over 6 years ago
Note: This was originally posted on 18th June 2008 at
http://forums.arm.com
AMBA spec (v2.0) only shows how the addresses wrap when hsize = 2 (word). Is it because the address boundary remains the same for each WRAP4, WRAP8, and WRAP16 cases? Or, should I re-calculate the wrap boundary based on hsize?
For example, I know from the spec that hsize = 2 and WRAP4 will sequence through addresses like this:
0x4 - 0x8 - 0xC - 0x0
Then, does hsize = 1 (halfword) and WRAP4, mean the sequence should be
0x4 - 0x6 - 0x8 - 0xA (using 4 word boundary)
or
0x4 - 0x6 - 0x0 - 0x2 (using 4 halfword boundary)?
Thanks!
Parents
0
Offline
abc_xyz pqr_def
over 6 years ago
Note: This was originally posted on 2nd December 2008 at
http://forums.arm.com
As Hemamth case 1 : If Start addr is 0x34, WRAP4, HSize is 2
Total no of bytes is 16
Therefore 4 bit alignment is there
So 4 consecutive addr are :
0011 0100 - beat1 - 0x34
0011 1000 - beat2 - 0x38
0011 1100 - beat3 - 0x3c
+0000 0100
-------------------
0100 0000 ---> But here 6th bit goes high, And bit alignment is 4??? -- on the basis of what we can say that its crossing the boundry?? Please clear me for the same... Thanks
we have to aligning it to 0011 0000 - 0x30
0011 0000 - beat4 - 0x30
Cancel
Up
0
Down
Reply
Accept answer
Cancel
Reply
0
Offline
abc_xyz pqr_def
over 6 years ago
Note: This was originally posted on 2nd December 2008 at
http://forums.arm.com
As Hemamth case 1 : If Start addr is 0x34, WRAP4, HSize is 2
Total no of bytes is 16
Therefore 4 bit alignment is there
So 4 consecutive addr are :
0011 0100 - beat1 - 0x34
0011 1000 - beat2 - 0x38
0011 1100 - beat3 - 0x3c
+0000 0100
-------------------
0100 0000 ---> But here 6th bit goes high, And bit alignment is 4??? -- on the basis of what we can say that its crossing the boundry?? Please clear me for the same... Thanks
we have to aligning it to 0011 0000 - 0x30
0011 0000 - beat4 - 0x30
Cancel
Up
0
Down
Reply
Accept answer
Cancel
Children
No data
More questions in this forum
By title
By date
By reply count
By view count
By most asked
By votes
By quality
Descending
Ascending
All recent questions
Unread questions
Questions you've participated in
Questions you've asked
Unanswered questions
Answered questions
Questions with suggested answers
Questions with no replies
Answered
strobe
0
6254
views
3
replies
Latest
27 days ago
by
Christopher Tory
Answered
AXI4-Relationships between the channels
0
1629
views
1
reply
Latest
1 month ago
by
Colin Campbell
Answered
How to assert PSLVERR in APB4 ?
0
1773
views
2
replies
Latest
1 month ago
by
PhanTam
Answered
How AHB Arbiter should handle granting bus masters while performing only a SINGLE transfer?
0
1688
views
1
reply
Latest
1 month ago
by
Colin Campbell
Answered
Should the SPLIT and RETRY response be given only for NONSEQ transfer?
0
2148
views
4
replies
Latest
1 month ago
by
ISHWAR GANIGER
<
>
View all questions in SoC Design forum