Arm Community
Site
Search
User
Site
Search
User
Groups
Arm Research
DesignStart
Education Hub
Graphics and Gaming
High Performance Computing
Innovation
Multimedia
Open Source Software and Platforms
Physical
Processors
Security
System
Software Tools
TrustZone for Armv8-M
中文社区
Blog
Artificial Intelligence
Automotive
Healthcare
HPC
Infrastructure
Innovation
Internet of Things
Machine Learning
Mobile
Smart Homes
Wearables
Forums
All developer forums
IP Product forums
Tool & Software forums
Pelion IoT Platform
Activity
Support
Open a support case
Documentation
Downloads
Training
Arm Approved program
Arm Design Reviews
More
Cancel
Developer Community
IP Products
System
Jump...
Cancel
System
SoC Design forum
applications of amba axi
Blogs
Forums
Videos & Files
Help
Jump...
Cancel
New
State
Not Answered
Replies
4 replies
Subscribers
71 subscribers
Views
5519 views
Users
0 members are here
AMBA
AXI
Bus Architecture
Related
applications of amba axi
Offline
abilash abilash
over 6 years ago
Note: This was originally posted on 7th February 2007 at
http://forums.arm.com
hello, i have read the whole of the axi protocol. i would like to know the applications of the protocol. is it anywhere used in the real time applications or some specific devices. if any please do tell me.
i would also like to know the advantages of axi protocol over the conventional data transfer protocols. please give details...
thanks... with regards....
Parents
0
Offline
abilash abilash
over 6 years ago
Note: This was originally posted on 12th February 2007 at
http://forums.arm.com
thank you so much for your response.... can you please explain me the following things you mentioned.... i read the architecture comletely... i came across these words.... but could not know the meaning.... can u please give some brief explanation of the following tings...
supporting write data interleaving
no defined timing relationship between address and data transfers
ability to add register slices to ease critical timing paths
thanking you....
with great regards.....
Cancel
Up
0
Down
Reply
Accept answer
Cancel
Reply
0
Offline
abilash abilash
over 6 years ago
Note: This was originally posted on 12th February 2007 at
http://forums.arm.com
thank you so much for your response.... can you please explain me the following things you mentioned.... i read the architecture comletely... i came across these words.... but could not know the meaning.... can u please give some brief explanation of the following tings...
supporting write data interleaving
no defined timing relationship between address and data transfers
ability to add register slices to ease critical timing paths
thanking you....
with great regards.....
Cancel
Up
0
Down
Reply
Accept answer
Cancel
Children
No data
More questions in this forum
By title
By date
By reply count
By view count
By most asked
By votes
By quality
Descending
Ascending
All recent questions
Unread questions
Questions you've participated in
Questions you've asked
Unanswered questions
Answered questions
Questions with suggested answers
Questions with no replies
Answered
strobe
0
6254
views
3
replies
Latest
27 days ago
by
Christopher Tory
Answered
AXI4-Relationships between the channels
0
1629
views
1
reply
Latest
1 month ago
by
Colin Campbell
Answered
How to assert PSLVERR in APB4 ?
0
1773
views
2
replies
Latest
1 month ago
by
PhanTam
Answered
How AHB Arbiter should handle granting bus masters while performing only a SINGLE transfer?
0
1688
views
1
reply
Latest
1 month ago
by
Colin Campbell
Answered
Should the SPLIT and RETRY response be given only for NONSEQ transfer?
0
2148
views
4
replies
Latest
1 month ago
by
ISHWAR GANIGER
<
>
View all questions in SoC Design forum