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  • Description Discuss the tiniest of sensors to high-end board computers, Arm provides a range of low-power processors to address the ever-expanding embedded market.
  • Threads 383 Questions
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Unanswered questions
  • Annie Cracknell
    Forum FAQs
    6 days ago
  • dchou4u
    missing spl/u-boot-spl-ddr.bin when building Uboot for Coral
    Not Answered 1 month ago
  • Atharva
    Priority Group Setting for NVIC Cortex-M7
    Not Answered 11 months ago
  • Srinuvasan
    USB pass through in QEMU command line for ARM machines
    Suggested Answer 22 days ago
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  • Not Answered

    Is Overwriting Ex-READ allowed when Ex-Write Response is pending? 0

    • AMBA 4
    • AX14
    9954 views
    3 replies
    Latest over 2 years ago
    by Vanhealsing
  • Not Answered

    Other core's view after writing ICC_SGI1R_EL1 to trigger SGI 0

    • CoreLink System Controllers
    • Interrupt
    10819 views
    5 replies
    Latest over 2 years ago
    by 42Bastian Schick
  • Not Answered

    DSB command for external Nor-Flash memory (Cortex-M7) 0

    • Cortex-M7
    • Cortex-M
    • Cortex-M4
    9888 views
    1 reply
    Latest over 2 years ago
    by 42Bastian Schick
  • Not Answered

    WRAP burst address calculation in case of unaligned transfers (AXI3) 0

    • AX13
    11048 views
    5 replies
    Latest over 2 years ago
    by Tejashree
  • Not Answered

    could i jump from BL2 direct to BL33? 0

    • Arm Trusted Firmware
    10326 views
    1 reply
    Latest over 2 years ago
    by jtzhou
  • Not Answered

    ATF design 0

    • Arm Trusted Firmware
    9265 views
    1 reply
    Latest over 2 years ago
    by jtzhou
  • Not Answered

    AXI Wrap burst address calculation, start_addr=0x96h, burst_size=8transfers each of 4 bytes wide 0

    • AXI
    9353 views
    0 replies
    Started over 2 years ago
    by Tejashree
  • Not Answered

    AHB master continues transfer after error response 0

    • AHB
    10637 views
    1 reply
    Latest over 2 years ago
    by Colin Campbell
  • Answered

    Data during AHB Busy state 0

    • AHB
    10624 views
    2 replies
    Latest over 2 years ago
    by deepak_ig
  • Answered

    What kind of memory barrier should be followed by writes ICC_SGI1R_EL1? 0

    • CoreLink System Controllers
    • Corelink
    • CoreLink GIC-500 Generic Interrupt Controller
    • Interrupt
    11247 views
    5 replies
    Latest over 2 years ago
    by 42Bastian Schick
  • Not Answered

    GIC 3.0's SGI interrupt latency seems much bigger than GIC 2.0 0

    • CoreLink System Controllers
    • CoreLink GIC-400 Generic Interrupt Controller
    • Corelink
    • CoreLink GIC-500 Generic Interrupt Controller
    • Interrupt
    13359 views
    15 replies
    Latest over 2 years ago
    by 42Bastian Schick
  • Not Answered

    Connection and interface between Cortex M3 and Wireless Activity detection transmitter 0

    • Cortex-M3
    • Wireless Communications
    • Cortex-M
    9906 views
    2 replies
    Latest over 2 years ago
    by Edward19
  • Not Answered

    Write transfer in AXI3 0

    • AMBA 3
    • AXI
    9207 views
    1 reply
    Latest over 2 years ago
    by Colin Campbell
  • Not Answered

    Undefined instruction exception 0

    • Toolchain
    • Keil MDK
    9813 views
    1 reply
    Latest over 2 years ago
    by David.Zhang
  • Answered

    Atmel SAM4E Bootloader/VTOR executing new application 0

    • Cortex-M
    • Cortex-M4
    32209 views
    18 replies
    Latest over 2 years ago
    by JoePapst
  • Answered

    Barrier Transactions in ACE +1

    • AXI
    • AMBA 5
    14656 views
    10 replies
    Latest over 2 years ago
    by Josesmn
  • Answered

    How to add support for LPC17xx series support in DistoRTOS 0

    • Real Time Operating System (RTOS)
    • C
    9377 views
    1 reply
    Latest over 2 years ago
    by Trampas
  • Not Answered

    SAM4S Bootloader Jump Address Offset 0

    • Keil
    • Cortex-M
    • Debugging
    • Cortex-M4
    11015 views
    1 reply
    Latest over 2 years ago
    by Trampas
  • Not Answered

    GIC virtualization -- GICH_ELRSR and hardware interrupts 0

    • Generic Interrupt Controller (GIC)
    9245 views
    0 replies
    Started over 2 years ago
    by Olivier Delande
  • Answered

    FVP Cortex R52 +1

    • Cortex-R52
    • Generic Interrupt Controllers
    • Cortex R
    • Fixed Virtual Platform
    11378 views
    5 replies
    Latest over 2 years ago
    by Tibor
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