AHB amba 5 lite - waited write transfer

Hello,

i didnt find at spec any note about the waited write transfer.

for example 

T1 : NONSEQ + write transfer  + HREADY is high

T2: HREADY dropped + HTRANS is idle - HWDATA ?

does the HWDATA have to be the right data or it can be any junk ? and only when the HREADY will rise again the HWDATA have to be the correct one ?

thank Michael

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  • HWDATA ***MUST*** be driven correctly for the entire data phase of the transfer. All diagrams in the spec will show HWDATA driven to a constant value for the full data phase of a write transfer.

    Section 6.1.1 of the AMBA 5 AHB spec does describe the HWDATA bus requirements...

    "If the transfer is extended then the master must hold the
    data valid until the transfer completes, as indicated by HREADY HIGH.
    "

    i.e. by "hold" it means that the data cannot change throughout the data phase, so it must start valid and end at the same valid value.

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