Standard Cell Benchmarking: Avoiding Five Common Pitfalls
Proper evaluation of standard cell libraries should lead you to select standard cells that will optimize power, performance and area for your design. This presentation reviews general evaluation practices and highlights potential pitfalls which could lead to erroneous results. Topics include an overview of an optimized power network, alignment to the library architecture, "don't use" cell lists, edge rates and wire lengths.
To any physical IP users out there: I'm interested to know about how much time is typically allocated for logic benchmarking. Any time frames?
I made just a few changes to this document to address libraries using either M1 only power rails or M2 (with or without M1) power rails.
Thanks, Leah! It's surprisingly difficult to benchmark correctly and there are many ways you can get an incorrect assessment. Leah's description here shows a number of key things to watch for as you're analyzing Standard Cell options.