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Latest Blogs
  • The Flexible Approach to Adding Functional Safety to a CPU

    Naresh Menon
    Naresh Menon
    Find out more about Functional Safety with SoC designs and Software Test Libraries.
    • October 22, 2020
  • The Future of Safety in the Digital Cockpit

    Daniel Bernal
    Daniel Bernal
    Developed with support from Arm, CoreAVI brings to market a comprehensive suite of graphics and compute drivers and libraries that will be certifiable for use in ISO 26262 ASIL D applications, for Arm…
    • September 30, 2020
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Unanswered questions
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    After first execution control goes to task 2 but i want him to go to task1 what i suppose to do here? 0

    • Real Time Operating Systems (RTOS)
    2152 views
    1 reply
    Latest 1 month ago
    by fixxxer
  • Not Answered

    Is there any extra parameter needed to start networking on FVP_MPS2_M7 simulator? 0

    • Embedded Software
    • Cortex-M7
    • Simulation
    • Cortex-M3
    • networking
    • Fast Models
    • Cortex-M7 FVP
    2840 views
    1 reply
    Latest 1 month ago
    by fixxxer
  • Not Answered

    L1 cache BW 0

    2579 views
    2 replies
    Latest 1 month ago
    by fixxxer
  • Not Answered

    Making ONVIF conformant surveillance camera with STM32H743. 0

    • stm32 h7
    3059 views
    5 replies
    Latest 1 month ago
    by ibrahim1236
  • Not Answered

    LPC2138 Program Execution Issue 0

    1683 views
    0 replies
    Started 1 month ago
    by kishor potdar
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Most viewed questions
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    Open Source IDE +1

    • Cortex-M
    • Cortex-M4
    2991 views
    2 replies
    Latest over 4 years ago
    by G. Goodwin L. Pitos
  • Answered

    Exception priority behavior 0

    • Cortex-R.Cortex-R4
    • Armv7-R
    3033 views
    6 replies
    Latest over 5 years ago
    by Yasuhiko Koumoto
  • Answered

    I have  to do project on MMC card interfacing and Audio Player on ARM CORTEX M3 ..which hardware and software should I use for it? +1

    • Cortex-M3
    • Cortex-M
    3060 views
    1 reply
    Latest over 4 years ago
    by Tony Cook
  • Answered

    Does the Cortex M0+  Single-Cycle IO Bus have an address bus to decode multiple IO sets for read and write? 0

    • Cortex-M0
    • Bus Interface
    • Cortex-M
    3092 views
    1 reply
    Latest over 5 years ago
    by daith
  • Answered

    AXI +1

    • AMBA
    • AXI
    • amba4
    • Interface
    3109 views
    2 replies
    Latest over 3 years ago
    by Muthuvenkatesh
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