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Latest Blogs
  • The Flexible Approach to Adding Functional Safety to a CPU

    Naresh Menon
    Naresh Menon
    Find out more about Functional Safety with SoC designs and Software Test Libraries.
    • October 22, 2020
  • The Future of Safety in the Digital Cockpit

    Daniel Bernal
    Daniel Bernal
    Developed with support from Arm, CoreAVI brings to market a comprehensive suite of graphics and compute drivers and libraries that will be certifiable for use in ISO 26262 ASIL D applications, for Arm…
    • September 30, 2020
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Unanswered questions
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    In APB, for data bus width, can I increase from 32 bits(default) to 64 bits(as per my project requirements)? 0

    • APB
    • AMBA 2 APB Interface
    1642 views
    1 reply
    Latest 7 days ago
    by Colin Campbell
  • Not Answered

    what is "transfer" signal mentioned in the APB state diagram? Can I use "PSELx" signal to determine transfer is going to happen? 0

    • APB
    • AMBA 2 APB Interface
    1572 views
    1 reply
    Latest 7 days ago
    by Colin Campbell
  • Not Answered

    signedness using tilde 0

    594 views
    0 replies
    Started 8 days ago
    by Fausto
  • Not Answered

    Build issue on UEFI ARM in Windows 10 console 0

    • UEFI
    1049 views
    0 replies
    Started 12 days ago
    by Josh0027
  • Not Answered

    arm4.19.90中问题 0

    1149 views
    0 replies
    Started 21 days ago
    by _dnan
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Most viewed questions
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    GICv3 specification 0

    • Generic Interrupt Controller (GIC)
    • 64-bit
    3340 views
    3 replies
    Latest over 5 years ago
    by daith
  • Answered

    Converting virtual address of Instruction fault address register to physical address in cotex A9 +1

    • Cortex-A9
    • Cortex-A
    3366 views
    1 reply
    Latest over 3 years ago
    by Martin Weidmann
  • Answered

    SWD physical structure +1

    • Serial Wire Debug (SWD)
    • CoreSight
    3396 views
    2 replies
    Latest over 5 years ago
    by Minsu
  • Answered

    Partial Word Access to Altera Avalon Memory-Mapped Slave 0

    • AMBA
    • Arm Development Studio
    • FPGA
    • AXI
    3406 views
    1 reply
    Latest over 4 years ago
    by Qiangsheng Xiang
  • Answered

    AHB DeadLock: HREADY=0 & HTRANS=BUSY +1

    3443 views
    3 replies
    Latest 2 months ago
    by Oliver Beirne
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