IoT refers to thousands of diverse market segments that are now using connected intelligent devices: from IoT nodes with rich user interfaces, to tiny sensors that are powered only by energy that is harvested from the environment. These small IoT nodes are where ARM’s Cortex-M processors come in.
At ARM TechCon 2016, ARM introduced two new members of the Cortex-M family: the Cortex-M23 and the Cortex-M33. For this blog, we will be focusing on the Cortex-M33, but you can find more information about the Cortex-M23 in this blog by thomasensergueix: Cortex-M23 and Cortex-M33 – a security foundation for billions of devices and this one: Five key features of the ARM Cortex-M23 Processor.
One of the key features of the Cortex-M33 is the dedicated co-processor interface . This is the first Cortex-M profile processor to offer such an interface that extends the processing capability of the CPU. Why now, when chip designers have been adding accelerator blocks to Cortex-M based designs for the past ten years?
A co-processor, or accelerator block , addresses the need for the optimal balance between throughput and power consumption. An example to illustrate this point is a cryptography accelerator. Encryption functions can be done in software, of course, but at some point it is more energy efficient to do the function in hardware. A complete packet is sent to the accelerator for encryption before transmission.
This is a packet-based operation that happens occasionally. In this scenario, the cryptography accelerator performs its task properly when connected to the system bus. There is no need for the special situation of tight coupling with the processor.
The sensor-rich nature of IoT is now driving the need for a tightly coupled co-processor, rather than a bus based accelerator block. There is a group of applications that require frequent intensive compute operations; they benefit from being tightly coupled with the processor, as opposed to remaining as a block on the system bus.
This new Cortex-M33 co-processor interface is designed to:
The interface offers 32 and 64-bit data read and write operations and has the advantage over the traditional AHB system interface in that accelerator access speed is much faster - it does not require any instructions to setup an address. By connecting the frequently used accelerators to the dedicated interface, the bandwidth loading on the system bus is dramatically reduced. With the ability to connect up to eight co-processors to the interface, designers can add a wide set of accelerators to suit all applications.
One example is a smart sensor which would use specialised filtering to process the sensor data. These can be processed in software within the CPU, but for frequent, complex operations, custom acceleration integrated via the co-processor interface can be faster and more efficient.
A blog about the Cortex-M33 is never complete without a mention of security which is essential for the growth of deployments across the diversity of IoT markets. The Cortex-M23 and Cortex-M33 are the first processors based on the ARMv8-M architecture; they bring ARM TrustZone security to even the smallest of embedded devices. Both processors offer enhanced memory protection and debug, with dedicated protection for both Secure and Non-secure areas. The following is a diagram of the key features of the Cortex-M33. For more details please see this other blog.
For certain applications, tightly coupled special-purpose compute accelerators can make a dramatic difference for power and performance.
It is essential that this is done in a way that maintains all of the benefits of the world’s #1 ecosystem with the widest choice of development tools, compilers, debuggers, operating systems, and middleware. The ARM ecosystem saves developers time and cost, and increases productivity.
The Cortex-M33’s new highly-efficient co-processor interface enables custom acceleration to be tightly coupled with the processor thus extending the capabilities of the processor for these specific functions. And crucially, it does this without fragmenting the ecosystem.
Stay tuned for the next blog in the ARMv8-M series where Thomas Lorenser will discuss DSP operations for Cortex-M33.
I am looking forward to it.
thank you for your interest.
we are working as fast as possible to get the technical reference manual posted to the web.
It will have the full details
Hi Diya Soubra,
I am interested in the co-processor interface.
I would like to know more about the co-processor interface.
Could you tell us how the co-processor interface is used.
Does it provide much faster interface for the legacy bus-type co-processors?
Can it gain much more performance because of the dedicated bus, whereas the interface is the same as the legacy (and slower) one?
Otherwise, are there special instructions (probably they are implementation defined) to use the dedicated co-processor interface?