• gcc does not generate correct code while building PIC

    Hey guys,

    I have been exploring building PIC using the gcc toolchain and I think there is a bug.

    I first build a shared library using 

    arm-none-eabi-gcc -shared -mcpu=cortex-m4 -mthumb -Wall -g -fPIC -fmessage-length=0 --specs=nosys.specs mylib.c -o libmylib…

  • M0+ Stack Pointer (PSP/MSP) Clarification

    Background

     I'm working part-time on a Cortex M0+ based SoC converting a very processor-intensive section of C++ code (inner-loop executed 10s of 1000s of times a second & compiles to over 400 instructions using GNU O3) and after almost 3 months of work…

  • Store the value of PC to Memory address

    I want to store the value of Program Counter(pc) to a memory location.

    I did this, 

        LDR R1, =[0x20000000]

        STR R15, [R1,#0]

    I got an error saying, "Error: r15(pc) not allowed here -- `str R15,[R1,#0]'.

    How should I get over this error?

  • NVIC and ARM asm

    Cannot configure interupts of TIM6 on stm32f103 board

    Does my NVIC configuration wrong?

    Code:

    @ stm32f103 timer & interrupt test by laper_s (from 2019-02-02)

.thumb
.cpu cortex-m3
.syntax unified

.word   0x20005000
.word   start + 1

b   start…