• Enabling NEON Instructions on Pixhawk

    I am trying to get a quadcopter flying using the Pixhawk controller (Cortex M4 running NuttX RTOS) and I am using the Simulink Pixhawk PSP to implement a custom controller. Our controller uses neural networks, so neon instructions are needed (the build…

  • NE10-Library -> FIR-Filter cycle counts: C-version faster than NEON-version?

    Hi,

    i'm currently trying to measure cycle counts for FIR-filtering with the NE10 library. I'm using a Raspberry Pi 2 with ARM Cortex-A7 running on Raspbian as a target.

    I activated the Cortex-A7 performance counter register to read out the cycles…

  • Questions regarding NEON

    Hi,

    for a project regarding Digital Signal Processing on ARM SoCs i'm currently gathering some information about the ARM NEON engine and would need some clarification if my assumptions are correct.

    I found an instruction timing table in the "Cortex…

  • NEON SIMD Dn Register and Parallel Operations

    Thank you for your reply. A few more questions:

    Is Dn a 128-bit wide register? Is Dd also a 128-bit wide register? (Referring to the diagram in the original question)

    Also, the diagram shows 4 parallel operations. Is this the actual number of parallel operations…

  • NEON SIMD Register Diagram

    Hello,

    I’m new to ARM architecture and was looking to get a better understanding of how it works. Most notably, the Cortex-A series and its DSP functionality.

    When looking through the NEON SIMD page on ARM's webpage (NEON - ARM), it mentions that…

  • NEON-Advanced SIMD vs. SIMD

    Hello,

    I’m new to ARM architecture and was looking to get a better understanding of how it works. Most notably, the Cortex-A series and its DSP functionality.

    When reading through ARM’s webpage, it often refers to “NEON-Advanced SIMD”, “NEON”, and…

  • How to enable Neon in cortex A8?

    Hi,

          I am using beaglebone which has the processor TI Sitara AM335X. I want to make use of Neon coprcessor for my project, To enable neon, I have to follow these commands. But I can't access these registers ( especially FPEXC…

  • Data abort, External abort.. How can i find cause????

    Hi, experts

    I'm developing Secure OS on A57/53 bit.LITTLE SoC. But as you know.. Cuz i'm really beginner..

    I beg your wisdom...

    Current situation is :

    • For making a TA. Bring the related data from REE and Mapping TEE side's NON-SECURE memory. (Data…

  • Memory barrier (DSB, DMB). Does they guarantee writing data on cache to memory?

    Hi Experts,

    I'm reading white paper for ARMv7 and ARMv8.

    but when i reading cache part and memory re-ordering, i have silly questions.....

    Suppose there are below instructions..

     

    Core A:

         STR R0, [Msg]

         STR R1, [Something…

  • NEON: Cortex A7 is 4 times slower than Cortex A8 ?

    I'm seeing Cortex-A7 cycle-timing table here :

    http://hardwarebug.org/2014/05/15/cortex-a7-instruction-cycle-timings/


    For example, 

    VADD.F32 Dd, Dn, Dm takes 2 cycles

    VADD.F32 Qd, Qn, Qm takes 4 cycles

    same goes for VMUL..

    Is this really the case…

  • question about arm cortex-a9 neon optimization(4x4 matrix mul)

    =======================================

    for matrix 4 by 4 multiplication, neon programming is slower than natural code with

    auto-vectorization option. (Xilinx Zynq 702 EVM board - cortex a9 with gcc complier option

    -mfloat-abi=softfp -mfpu=neon-fp16 -ftree…

  • AARCH64 assembly syntax for ARMCLANG

    Hello,

    where can I get documentation for the AARCH64 and NEON64 assembly syntax for armclang (internal assembler)

    I have some issues when compiling my GNU assembly code with armclang.

    For example, the instruction:

    MOV v0.2d[0], x4

    reports "error: invalid…

  • De-merits in using Cortex A9 for single core processor

    Hi Experts,

    A8 is meant for single core and A9 is for multi-core based.

    Consider in case of SoC is build with single core of A9 and A8 how we could compare both in terms of some metrics/parameters like power/speed ?

  • Understanding ARM NEON instruction

    hi i am trying to understand ARM NEON instruction and encountered with vqrdmulh instruction.

    i am particularly interested in saturation case in instruction i am not getting any case with saturation .

    Can any one explain me with an example

    for example:

    vqrdmulh…

  • How to compile with gcc toolchain that uses ARM neon instructions

    Hi,

    I would like to ask which version of gcc and with what flags , may I compile some c code to assembly code that uses arm neon coprocessor for ARMV7-A processor. Of course I want to use the processor itself but also the coprocessor. Is this gcc optimal…

  • Introducing Cortex-A35: ARM's Most Efficient Application Processor

    The announcement of the ARM®Cortex®-A35 processor today marks the beginning of a new family of ultra high efficiency application processors from ARM. So, what are the key features of Cortex-A35 and what benefits does it provide compared to previous…

  • Important Arm Technical Learning Resources

    Given the enormous amount of resources compiled on the Community over the past few years, I thought it might be useful to some users to compile all the 'technical' resources in one document. The links below focus on resources for software engineers and…

  • New version of the Cortex-A Series Programmer's Guide is Available

    The ARM® Cortex®-A Series Programmer’s Guide has proved to be a very popular addition to the ARM documentation set, and now also forms the reference textbook for the ARM Accredited Engineer(AAE) examinations.

    The updated ARM® Cortex®-A…

  • A Walk Through the Cortex-A Mobile Roadmap

    Chinese Version中文版

    Introduction

    The ARM Cortex-A mobile application processor product line spans several generations and three main product tiers. Developers and SoC designers experienced with one or more of the newer ARM ARM Processors benefit from an…

  • Coding Using NEON Technology

    利用NEON技术编写代码

    ARM NEON™ technology is widely used for multimedia optimization. The SIMD architecture of NEON technology makes it very suitable for many compute intensive modules in multimedia codecs such as filtering, de-blocking etc. This blog explores…

  • Coding for Neon - Part 5: Rearranging Vectors

    This article describes the instructions provided by Neon for rearranging data within vectors. Previous articles in this series:

    In…

  • Coding for Neon - Part 4: Shifting Left and Right

    Chinese Version 中文版：NEON编码 - 第4部分: 左右移位

    This article introduces the shifting operations provided by Neon, and shows how they can be used to convert image data between commonly used color depths.

    Previous articles in this series:

  • Coding for Neon - Part 3: Matrix Multiplication

    In part 1 of this series we dealt with how to load and store data with NEON, and part 2 involved how to handle the leftovers resulting from vector processing. Let us move on to doing some useful data processing - multiplying matrices.

    Matrices

    In this…

    • matrix_asm_sched.s.txt.zip

  • Coding for Neon - Part 2: Dealing With Leftovers

    In part 1 of this series on Neon about loads and stores we looked at transferring data between the Neon processing unit and memory. In this post, we deal with an often encountered problem: input data that is not a multiple of the length of the vectors…

  • Coding for Neon - Part 1: Load and Stores

    Arm's Neon technology is a 64/128-bit hybrid SIMD architecture designed to accelerate the performance of multimedia and signal processing applications, including video encoding and decoding, audio encoding and decoding, 3D graphics, speech and image…