• The cortex-A7's pipeline support dual-issue, so I want to ask what's the dual-issue mean?

    The cortex-A7's pipeline support dual-issue, so I want to ask what's the dual-issue mean?

    I find some answers say that dual-issue means that the cortex-A7 can issue two instructions per clock.

    But in the cortex-A7's pipeline diagraph, it has integer…

  • Explain 8 stage pipeline of ARM Cortex a7?

    Brief explanation of each stage of ARM pipe-lining.  

    How many Neon pipeline stages are their?

    What is dual issue in ARM pipe-lining?

  • NE10-Library -> FIR-Filter cycle counts: C-version faster than NEON-version?

    Hi,

    i'm currently trying to measure cycle counts for FIR-filtering with the NE10 library. I'm using a Raspberry Pi 2 with ARM Cortex-A7 running on Raspbian as a target.

    I activated the Cortex-A7 performance counter register to read out the cycles…

  • NEON: Cortex A7 is 4 times slower than Cortex A8 ?

    I'm seeing Cortex-A7 cycle-timing table here :

    http://hardwarebug.org/2014/05/15/cortex-a7-instruction-cycle-timings/


    For example, 

    VADD.F32 Dd, Dn, Dm takes 2 cycles

    VADD.F32 Qd, Qn, Qm takes 4 cycles

    same goes for VMUL..

    Is this really the case…

  • A Walk Through the Cortex-A Mobile Roadmap

    Chinese Version中文版

    Introduction

    The ARM Cortex-A mobile application processor product line spans several generations and three main product tiers. Developers and SoC designers experienced with one or more of the newer ARM ARM Processors benefit from an…