• Problem in understanding behaviour of GCC compiler (aarch64-none-elf-gcc) on Neon intrinsics for ARM cortex a53

    Hi,

    I am using IDE Xilinx SDK 2019.1 for my application and running it on ARM cortex a53  processor with Neon and floating point engine support available. I am working on a bare metal application.

    The problem I am facing is that, I am unable to understand…

  • compiler optimization options for ARMv8 GCC compiler on ARM cortex a53 (bare metal application)

    I am using ARMv8 GCC compiler(aarch64-none-elf-gcc) for my bare metal application on ARM cortex a53. I am using neon intrinsics with plain C in my code so I would like to ensure to use all optimization option available for this compiler.

    I tried -mfpu…

  • Optimization of Neon Intrinsics on ARM cortexa53

    I am using ARMv8 GCC compiler and I would like to optimize Neon Intrinsics code for better execution time performance. I have already tried loop unrolling and I am using look up table for the computation of log10. Any ideas?

    Here is the code:

    static inline…

  • How does the ARM CA53 4 core join NEON on only 2 cores?

    Our project only wants 2 cores to support NEON for cost reasons. How can I do this?

    1. Can a single cluster be done?


    2. Cut into 2 clusters, each with 2 cores. What is the difference between the performance of ARM HMP scheduling 4 cores and the performance…

  • A Walk Through the Cortex-A Mobile Roadmap

    Chinese Version中文版

    Introduction

    The ARM Cortex-A mobile application processor product line spans several generations and three main product tiers. Developers and SoC designers experienced with one or more of the newer ARM ARM Processors benefit from an…