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    Could anyone give me the code to get the current secure state?

  • Zeroise complete L1 and L2 caches in ARM v8?

    Hi All,

    my situation is, I have to zeroize complete caches in ARM-v8 (Xilinx Ultrascale+ Device). Zeroise or set every line to constant values.

    Does anybody know how can I solve this?

    Thanks in advance.

  • Motherboard provider with Cortex-A53 or ARM Cortex-A57

    Hello,

    I want to experiment with a storage solution ARM based. Is there any provider actually selling dev kits or consumer boards based on ARM Cortex-A53 or ARM Cortex-A57?

    Obviously the main requirement for purchase is the availability of SATA3 ports for…