Hi.
As I know Cortex M3 design kit have lots of stuff IP. one of those things is cmsdk_ahb_busmatrix.
But I want to know does cmsdk_ahb_busmatrix supports AHB-full specification? or just supports AHB-LITE?
I'm confuse that because there some example explained…
9Hi,
I want to develop a system with ARM Cortex M3 (LPC 1768 or LPC1343) can talk to each other ysing wifi module or Bluetooth Module. Plzz help in this contex as i am new toi ARM
Hello to all,
I would like to measure the current variation due to Functional Unit activation and deactivation. Can anyone help me out with the assembly program or the code through which I can measure this? I am using LPCXpresso 54114 board(ARM Cortex…
I am trying to figure out the variation in current consumption as well as in clock cycles due to different memory regions and different offsets. During various experiments, I have found the following results:
LDR R4,[R1,#0x0] (R1 = 0x00000000…
In order to measure the current variation due to instruction address location. I filled the memory with NOP instructions and tried to observe the variation in the current consumption due to change in the instruction address, although the…
While working on different assembly instructions, I have come across a very different problem of the register's place. For example:
SBC r11,r7,r11 : 3.0217mAmps
but
SBC r11,r7,r7 : 2.7477mAmps
Similarly, for ORN and MVN also.
For all…
I need a small help with the processor instructions. Can anybody provide me an example where during execution, the functional unit must not be used or it must be deactivated?
All data-processing and data-transfer instruction need the functional…
I am working on Cortex-M4 and would like to know about the hazard situation. In order to see the effect of Data-Hazard, I have executed few application codes. For example,
LDR R5,[R6,#offset]
ADD R5,R8,R2
ADD
Since I am working on ARM Cortex-M4, I would like to know about the handling of the hazard situations (especially the RAW, WAR and WAW hazard situations) in the pipeline.
Is the processor also use the method of "Forwarding" in order to handle…
I have a whole bunch of hardfault annotations - all of them show CFSR value as 0. I've tested the annotation mechanism with two intentional hardfaults (divide by zero and write through null pointer) and both recorded the correct CFSR value. Of course…
Hi to you all,In my current project I need to send over a serial bus an array of integers:
The driver I'm using (actually USB CDC VCOM from NXP, which is embedded in LPCOpen) takes pointer to unit8 and…
I am currently working on ARM cortex-M4. While I was running different codes of instructions, I have noticed an increment in the current consumption corresponding to the increment in the frequency. Or in other words, the higher frequency…
Hi
Now I'm trying to understand about memories in the Cortex design kit.
I came across memory address map of cortex M3 when I googling as the below.
In the image, left one is an AHB memory map, and right one is STM32F103's memory map.
As you…
Just wanted a small information about the MVN instruction, that when the source and destination register number is same, then why does it throw higher energy consumption? Since I have tried with MOV instruction also, but it's normal with…
Dear All,
Now I'm trying to digging the M3 operation in especially reset sequence with hello example of cortex design kit.
Current situation is that reg14[31:0] is fixed in 0xFFFFFFFF and reg15[31:2] is 0xXXXXXXXX unkown value. the other regs are…
Hi to you all,I'm using an LPC4370 (in a link2 probe) to output the data acquired @ 40 MSPS using the USB CDC VCOM driver included in the LPCOPEN Libraries. I can output an array of uint32_t elements and read it properly in Matlab at the host side…
I am working on ARM Cortex-M4. Since it has 32-bit address bus, therefore I assumed that each 32-bit instruction will be allocated a physical address location in the Flash. But while reading the disassembly of the code, I got to know that…
Hi together,
im am working on a project managing high IRQ/ISR loads. (NXP S32K14x)
On some critical sections i have to suspend global interrupt mechanism (cpsid i) and resume afterwards.
Is it necessary to include a _dsb or _isb instruction after disabling…
Hi,
Thanks for your supporting in advance, As I know M0 or M3's design start kit have some example which is firmware such as Hello.
If I compiled that Hello firmware in the window, then can I use directly into the design start kit? or should I need…
Currently I'm digging the bus matrix 4x2 bus matrix from
But I have some question.
How does the bus matrix4x2 implement in bus matrix?
I just draw what I've understand it as the below
Am I understanding correctly?
I want to understand internal…
I am willing to know the variation in the current consumption due to the instruction address. Therefore I have performed two experiments, first time filled the pipeline with a 32-bit instruction and second time filled it with the 16-bit…
Hello ARM Community,
some time ago I started with Cortex-M1 core on Actel Proasic3L FPGA. I don't have much experience, but I have development board without working example:) I tried to follow Actel's tutorials and create simple LED blinking application…
Dear all,
could you please tell me if it is possible to interface a Cortex M4 (3.3V) with a PSRAM (1.8V) directly or do I have to add a logic level (Voltage Translation) between both?With kind regards,David
I am working on ARM Cortex-M4 and the memory arrangement is the little endian. I have started working on the memory instructions and for that purpose, I have chosen the offset addressing and the relationship between the offset and cycles…
I am working on Cortex-M4 and in order to implement the load and store instructions, I have chosen the pre and post-index addressing and the memory arrangement is little endian. Therefore during the execution, an observation related to consumed…