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Architectures and Processors forum Cortex R5 behavior when a masked imprecise/asynchronous abort occurs

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Cortex R5 behavior when a masked imprecise/asynchronous abort occurs

Antoine Certain over 6 years ago

Hello,

I am currently working on the cortex R5 and I am wondering its behavior when a masked imprecise abort occurs. Indeed, The A-bit in the CPSR is set by default. Which mean that imprecise abort will be masked.

My problem is to understand in which state will be the core after a masked asynchronous abort. Can we imagine it will infinitely loop on the instruction responsible for the abort ? Maybe it will just ignore the instruction ?

I did not find answers among documentations so I ask for your help.

Thanks you.

Antoine

Top replies

Martin Weidmann over 4 years ago in reply to Etienne Alepins +1 verified

Hi, Wow, old thread. Yes, an async abort will be pended until it can be taken (i.e. the CPSR.A bit cleared). In terms of checking for async aborts, later processors have the ISR register, which lets...