Hi all,
I am using MPU of Cortex-R5, in doing so when writing to Base Register, via standard CP15 access. (MCR p15, 0, Rd, c6, c1, 0) it randomly causes Prefetch Abort Exception, i.e. sometimes it works fine aswell. and IFSR shows PERMISSION type fault.
The regions' base address are aligned to their respective sizes.
So, what can be a possible reason for this behaviour ?
Thanks in advance.
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